OMAP3515_15 Datasheet, PDF (170/264 Pages) Texas Instruments – OMAP3515 and OMAP3503 Applications Processors

OMAP3515, OMAP3503
SPRS505H – FEBRUARY 2008 – REVISED OCTOBER 2013
GPMC_FCLK
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gpmc_clk
gpmc_ncsx
gpmc_a[26:17]
gpmc_nbe0_cle
gpmc_nbe1
gpmc_nadv_ale
gpmc_noe
gpmc_a[16:1]_d[15:0]
gpmc_io_dir
FA9
FA10
FA10
FA3
FA12
FA13
FA29
Address (LSB)
OUT
FA14
FA1
FA5
Address (MSB)
FA0
Valid
FA0
Valid
FA4
FA37
FA15
IN
Data IN
Data IN
OUT
gpmc_waitx
030-030
Figure 6-11. GPMC/Multiplexed NOR Flash – Asynchronous Read – Single Word Timing(1) (2) (3)
(1) In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, 2, or 3.
(2) FA5 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC functional clock
cycles. From start of read cycle and after FA5 functional clock cycles, input data is internally sampled by active functional clock edge.
FA5 value must be stored inside AccessTime register bit field.
(3) GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.
170 TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
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