LMH0384 Datasheet, PDF (4/29 Pages) National Semiconductor (TI) – 3 Gbps HD/SD SDI Extended Reach and Configurable Adaptive Cable Equalizer

LMH0384
SNLS308G – APRIL 2009 – REVISED JUNE 2015
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RUM Package
16-Pin WQFN
Top View
16 15 14 13
V_{EE 1}
SDI 2
SDI ³
SPI_EN 4
LMH0384
12 MISO
11 SDO
10 SDO
9 SS
56 7 8
DAP = V_EE
NOTE: The exposed die attach pad is a negative electrical terminal for this device. It should be connected to the negative
power supply voltage.
Pin Functions – SPI Mode / SPI_EN = V_CC
PIN
I/O, TYPE DESCRIPTION
NO.
NAME
1
V_EE
Ground Negative power supply (ground).
2
SDI
I, SDI
Serial data true input.
3
SDI
I, SDI
Serial data complement input.
4
SPI_EN
I, LVCMOS SPI register access enable. This pin has an internal pulldown.
H = SPI register access mode.
L = Pin mode.
5
AEC+
I/O, Analog AEC loop filter external capacitor (1 µF) positive connection.
6
AEC-
I/O, Analog AEC loop filter external capacitor (1 µF) negative connection.
7
CD
O, LVCMOS Carrier detect.
H = No input signal detected.
L = Input signal detected.
8
MUTE_REF
I, Analog Mute reference input. Sets the threshold for CD and (with CD tied to MUTE) determines the
maximum cable to be equalized before muting. MUTE_REF may be either unconnected or
connected to ground for normal CD operation.
9
SS (SPI)
I, LVCMOS SPI slave select. This pin has an internal pullup.
10
SDO
O, LVDS Serial data complement output.
11
SDO
O, LVDS Serial data true output.
12
MISO (SPI) O, LVCMOS SPI Master Input / Slave Output. LMH0384 data transmit.
13
V_CC
Power
Positive power supply (+3.3 V).
14
SCK (SPI)
I, LVCMOS SPI serial clock input.
15
MOSI (SPI) I, LVCMOS SPI Master Output / Slave Input. LMH0384 data receive.
16
V_CC
Power
Positive power supply (+3.3 V).
—
V_EE
Ground Connect exposed DAP to negative power supply (ground).
4
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