DAC8565ICPWG4 Datasheet, PDF (35/49 Pages) Texas Instruments – 16-Bit, Quad Channel, Ultra-Low Glitch, Voltage Output

DAC8565
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Load Regulation
Load regulation is defined as the change in reference
output voltage as a result of changes in load current.
The load regulation of the internal reference is
measured using force and sense contacts as shown
in Figure 98. The force and sense lines reduce the
impact of contact and trace resistance, resulting in
accurate measurement of the load regulation
contributed solely by the internal reference.
Measurement results are summarized in the Typical
Characteristics. Force and sense lines should be
used for applications that require improved load
regulation.
Sense Line
Output Pin
Contact and
Trace Resistance
V_OUT
Force Line
I_L
Meter
Load
Figure 98. Accurate Load Regulation of the
DAC8565 Internal Reference
Long-Term Stability
Long-term stability/aging refers to the change of the
output voltage of a reference over a period of months
or years. This effect lessens as time progresses (see
Figure 6, the typical long-term stability curve). The
typical drift value for the internal reference is 50ppm
from 0 hours to 1900 hours. This parameter is
characterized by powering-up and measuring 20 units
at regular intervals for a period of 1900 hours.
SBAS411C – JUNE 2007 – REVISED MARCH 2011
Thermal Hysteresis
Thermal hysteresis for a reference is defined as the
change in output voltage after operating the device at
+25°C, cycling the device through the operating
temperature range, and returning to +25°C.
Hysteresis is expressed by Equation 3:
V_HYST =
|V_{REF_PRE} - V_{REF_POST}|
V_{REF_NOM}
´ 10⁶ (ppm/°C)
(3)
Where:
V_HYST = thermal hysteresis.
V_{REF_PRE} = output voltage measured at +25°C
pre-temperature cycling.
V_{REF_POST} = output voltage measured after the
device cycles through the temperature range
of –40°C to +120°C, and returns to +25°C.
DAC NOISE PERFORMANCE
Typical noise performance for the DAC8565 with the
internal reference enabled is shown in Figure 54 to
Figure 56. Output noise spectral density at the V_OUT
pin versus frequency is depicted in Figure 54 for
full-scale, midscale, and zero-scale input codes. The
typical noise density for midscale code is 120nV/√Hz
at 1kHz and 100nV/√Hz at 1MHz. High-frequency
noise can be improved by filtering the reference noise
as shown in Figure 55, where a 4.8μF load capacitor
is connected to the V_REFH/V_REFOUT pin and
compared to the no-load condition. Integrated output
noise between 0.1Hz and 10Hz is close to 6μV_PP
(midscale), as shown in Figure 56.
Copyright © 2007–2011, Texas Instruments Incorporated
Product Folder Link(s): DAC8565
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