DAC8565ICPWG4 Datasheet, PDF (30/49 Pages) Texas Instruments – 16-Bit, Quad Channel, Ultra-Low Glitch, Voltage Output

DAC8565
SBAS411C – JUNE 2007 – REVISED MARCH 2011
POWER-DOWN MODES
The DAC8565 has two separate sets of power-down
commands. One set is for the DAC channels and the
other set is for the internal reference. For more
information on powering down the reference, see the
Enable/Disable Internal Reference section.
DAC Power-Down Commands
The DAC8565 use four modes of operation. These
modes are accessed by setting three bits (PD2, PD1,
and PD0) in the shift register. Table 7 shows how to
control the operating mode with data bits PD0
(DB16), PD1 (DB15), and PD2 (DB14).
PD0
(DB16)
0
1
1
1
Table 7. DAC Operating Modes
PD1
(DB15)
X
0
1
1
PD2
(DB14)
X
1
0
1
DAC OPERATING MODES
Normal operation
Output typically 1kΩ to GND
Output typically 100 kΩ to GND
Output high-impedance
The DAC8565 treats the power-down condition as
data; all the operational modes are still valid for
power-down. It is possible to broadcast a power-down
condition to all the DAC8565s in a system; it is also
possible to simultaneously power-down a channel
while updating data on other channels.
When the PD0 bit is set to '0', the device works
normally with its typical current consumption of 1mA
at 5.5V with an input code = 32768. The reference
current is included with the operation of all four
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DACs. However, for the three power-down modes,
the supply current falls to 1.3μA at 5.5V (0.5μA at
3.6V). Not only does the supply current fall, but the
output stage also switches internally from the output
of the amplifier to a resistor network of known values.
The advantage of this switching is that the output
impedance of the device is known while it is in
power-down mode. As described in Table 7, there are
three different power-down options. V_OUT can be
connected internally to GND through a 1kΩ resistor, a
100kΩ resistor, or open circuited (High-Z). The output
stage is shown in Figure 96. In other words, DB16,
DB15, and DB14 = '111' represent a power-down
condition with Hi-Z output impedance for a selected
channel. '101' represents a power-down condition
with 1kΩ output impedance, and '110' represents a
power-down condition with 100kΩ output impedance.
Resistor
String
DAC
Amplifier
V_OUTX
Power-Down
Circuitry
Resistor
Network
Figure 96. Output Stage During Power-Down
All analog channel circuitries are shut down when the
power-down mode is exercised. However, the
contents of the DAC register are unaffected when in
power down. The time required to exit power-down is
typically 2.5μs for V_DD = 5V, and 5μs for V_DD = 3V.
See the Typical Characteristics for more information.
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