DAC8565ICPWG4 Datasheet, PDF (3/49 Pages) Texas Instruments – 16-Bit, Quad Channel, Ultra-Low Glitch, Voltage Output

DAC8565
www.ti.com
SBAS411C – JUNE 2007 – REVISED MARCH 2011
ELECTRICAL CHARACTERISTICS
At AV_DD = 2.7V to 5.5V, –40°C to +105°C range, and data format is straight binary (unless otherwise noted).
DAC8565
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
STATIC PERFORMANCE⁽¹⁾
Resolution
16
Relative accuracy
Measured by the line DAC8565A, DAC8565C
passing through
codes 485 and 64714 ^{DAC8565B, DAC8565D}
±4
±12
±4
±8
Differential nonlinearity
16-bit monotonic
±0.5
±1
Offset error
±5
±8
Offset error drift
Full-scale error
Measured by the line passing through codes 485 and
64714.
±1
±0.2
±0.5
Gain error
±0.05
±0.2
Gain temperature coefficient
AV_DD = 5V
±1
AV_DD = 2.7V
±2
PSRR
Power-supply rejection ratio Output unloaded
1
OUTPUT CHARACTERISTICS⁽²⁾
Output voltage range
Output voltage settling time
Slew rate
To ±0.003% FSR, 0200h to FD00h, R_L = 2kΩ,
0pF < C_L < 200pF
R_L = 2kΩ, C_L = 500pF
0
V_REF
8
10
12
2.2
Capacitive load stability
Code change glitch impulse
R_L = ∞
R_L = 2kΩ
1LSB change around major carry
470
1000
0.15
Digital feedthrough
SCLK toggling, SYNC high
0.15
Channel-to-channel dc crosstalk
Full-scale swing on adjacent channel
0.25
Channel-to-channel ac crosstalk
1kHz full-scale sine wave, outputs unloaded
–100
DC output impedance
At mid-code input
1
Short-circuit current
50
Power-up time
Coming out of power-down mode, AV_DD = 5V
2.5
Coming out of power-down mode, AV_DD = 3V
5
AC PERFORMANCE⁽²⁾
SNR
90
THD
SFDR
T_A = +25°C, BW = 20kHz, V_DD = 5V, f_OUT = 1kHz.
–77
First 19 harmonics removed for SNR calculation.
78
SINAD
77
DAC output noise density
T_A = +25°C, at mid-code input, f_OUT = 1kHz
120
DAC output noise
T_A = +25°C, at mid-code input, 0.1Hz to 10Hz
6
REFERENCE
Internal reference current consumption
AV_DD = 5.5V
360
AV_DD = 3.6V
348
External reference current
External V_REF = 2.5V, if internal reference is disabled,
all four channels active
80
Reference input range V_REFH Voltage
Reference input range V_REFL Voltage
Reference input impedance
V_REFL < V_REFH, AV_DD – (V_REFH + V_REFL) /2 > 1.2V
V_REFL < V_REFH, AV_DD – (V_REFH + V_REFL) /2 > 1.2V
0
AV_DD
0
AV_DD/2
31
(1) Linearity calculated using a reduced code range of 485 to 64714; output unloaded.
(2) Ensured by design or characterization; not production tested.
UNIT
Bits
LSB
LSB
LSB
mV
μV/°C
% of FSR
% of FSR
ppm of
FSR/°C
mV/V
V
μs
V/μs
pF
nV-s
nV-s
LSB
dB
Ω
mA
μs
dB
dB
dB
dB
nV/√Hz
μV_PP
μA
μA
μA
V
V
kΩ
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