CP3UB26 Datasheet, PDF (341/364 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with USB and CAN Interfaces

CP3UB26
www.ti.com
SNOSAE7E – APRIL 2005 – REVISED JANUARY 2014
29.12 ACCESS.BUS TIMING
Symbol
t_BUFi
t_CSTOsi
Table 29-10. ACCESS.bus Signals
Figure
Figure 29-17
Figure 29-17
Description
Reference
ACCESS.bus Input Signals
Bus free time between Stop and Start
Condition
SCL setup time
Before Stop Condition
t_CSTRhi
Figure 29-17 SCL hold time
After Start Condition
t_CSTRsi
Figure 29-17 SCL setup time
Before Start Condition
t_DHCsi
t_DLCsi
t_SCLfi
t_SCLri
t_SCLlowi
t_SCLhighi
t_SDAri
t_SDAfl
t_SDAhi
t_SDAsi
t_BUFo
t_CSTOso
t_CSTRho
t_CSTRso
t_DHCso
Figure 29-18
Figure 29-17
Figure 29-16
Figure 29-16
Figure 29-19
Data High setup time
Data Low setup time
SCL signal rise time
SCL signal fall time
SCL low time
Before SCL Rising Edge (RE)
Before SCL RE
After SCL Falling Edge (FE)
Figure 29-19 SCL high time
After SCL RE
Figure 29-16
Figure 29-16
Figure 29-19
Figure 29-19
Figure 29-17
Figure 29-17
SDA signal rise time
SDA signal fall time
SDA hold time
After SCL FE
SDA setup time
Before SCL RE
ACCESS.bus Output Signals
Bus free time between Stop and Start
Condition
SCL setup time
Before Stop Condition
Figure 29-17 SCL hold time
After Start Condition
Figure 29-18 SCL setup time
Before Start Condition
Figure 29-18 Data High setup time
Before SCL R.E.
t_DLCso
Figure 29-18 Data Low setup time
Before SCL R.E.
t_SCLfo
t_SCLro
t_SCLlowo
t_SCLhigho
t_SDAfo
t_SDAro
t_SDAho
t_SDAvo
Figure 29-16
Figure 29-16
Figure 29-19
SCL signal Fall time
SCL signal Rise time
SCL low time
Figure 29-19 SCL high time
Figure 29-16
Figure 29-16
Figure 29-19
SDA signal Fall time
SDA signal Rise time
SDA hold time
Figure 29-19 SDA valid time
After SCL F.E.
After SCL R.E.
After SCL F.E.
After SCL F.E.
Min (ns) Max (ns)
tSCLhigh
o
(8 ×
tCLK) -
tSCLri
(8 ×
tCLK) -
tSCLri
(8 ×
tCLK) -
tSCLri
2 × tCLK
2 × tCLK
-
-
16 ×
tCLK
16 ×
tCLK
-
-
0
2 × tCLK
-
-
-
-
-
-
300
1000
-
-
1000
300
-
-
tSCLhigh
o
tSCLhigh
-
o
tSCLhigh
-
o
tSCLhigh
-
o
tSCLhigh
-
o-
tSDAro
tSCLhigh
-
o-
tSDAfo
-
300
-
-
(K ×
-
tCLK) -1
(K ×
-
tCLK) -1
-
300
-
-
(7 × t_CLK)
- t_SCLfo
-
(7 × t_CLK)
+ t_RD
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ELECTRICAL CHARACTERISTICS 341