CP3UB26 Datasheet, PDF (161/364 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with USB and CAN Interfaces

CP3UB26
www.ti.com
SNOSAE7E – APRIL 2005 – REVISED JANUARY 2014
18.6.2 Transmit Priority
The CAN module is able to generate a stream of scheduled messages without releasing the bus between
two messages so that an optimized performance can be achieved. It will arbitrate for the bus immediately
after sending the previous message and will only release the bus due to a lost arbitration.
If more than one buffer is scheduled for transmission, the priority is built by the message buffer number
and the prior- ity code in the CNSTAT register. The 8-bit value of the priority is combined by the 4-bit
TXPRI value and the 4-bit buffer number (0...14) as shown below. The lowest resulting number results in
the highest transmit priority.
7
4
3
0
TXPRI
BUFFER #
Table 18-4 shows the transmit priority configuration if the priority is TXPRI = 0 for all transmit buffers:
TXPRI
0
0
-
-
-
-
0
Table 18-4. Transmit Priority (TXPRI = 0)
Buffer Number
PRI
0
0
1
1
-
-
-
-
-
-
-
-
14
14
TX Priority
Highest
-
-
-
-
Lowest
Table 18-5 shows the transmit priority configuration if TXPRI is different from the buffer number:
TXPRI
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Table 18-5. Transmit Priority (TXPRI not 0)
Buffer Number
PRI
0
224
1
209
2
194
3
179
4
164
5
149
6
134
7
119
8
104
9
89
10
74
11
59
12
44
13
29
14
14
TX Priority
Lowest
Highest
Note: If two buffers have the same priority (PRI), the buffer with the lower buffer number will have the
higher priority.
Copyright © 2005–2014, Texas Instruments Incorporated
Submit Documentation Feedback
CAN MODULE 161