CP3UB26 Datasheet, PDF (13/364 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with USB and CAN Interfaces

CP3UB26
www.ti.com
4 SIGNAL DESCRIPTIONS
SNOSAE7E – APRIL 2005 – REVISED JANUARY 2014
12 MHz Crystal
or Ext. Clock
32.768 kHz
Crystal
X1CKI/BBCLK
X1CKO
X2CKI
X2CKO
PB[7:0]
8
PC[7:0]
8
Power
Supply
Chip Reset
JTAG I/F to
Debugger/
Programmer
Mode
Selection
MFT
ADC/
Touchscreen
ACCESS.bus
CAN bus
1
AVCC
1
AGND
1
ADVCC
1 ^ADGND CP3UB26
6 ^VCC _(LQFP-128)
6
GND
15
IOVCC
14
IOGND
PGO
PG1
RESET
PG3
PG4
TMS
PG5
TDI
TDO
TCK
RDY
PE0/RXD0
PE1/TXD0
PE2/RTS
PE3/CTS
ENV0
ENV1
ENV2
PG7/TA
PE4/CKX/TB
PH0/RXD1/WUI11
PH1/TXD1/WUI12
ADC0/TSX+
ADC1/TSY+
ADC2/TSX-
ADC3/TSY-
PH2/RXD1/WUI13
PH3/TXD1/WUI14
PH4/RXD1/WUI15
PH5/TXD1/WUI16
ADC4/MUXOUT0
ADC5/MUXOUT1 PF0/MSK/TIO1
ADC6
PF1/MDIDO/TIO2
ADC7/ADCIN _{PF2/MDODO/TIO3}
PJ7/ASYNC/
WUI9
PF3/MWCS/TIO4
VREFP
PF4/SCK/TIO5
SDA
SCL
PF5/SFS/TIO6
PF6/STD/TIO7
PF7/SRD/TIO8
PH6/CANRX/
WUI17
PH7/CANTX
PE5/SRFS/NMI
PG2/SRCLK
12 MHz Crystal
GPIO _{or Ext. Clock}
X1CKI/BBCLK
X1CKO
PB[7:0]
8
PC[7:0]
8
32.768 kHz
X2CKI
A[22:0]
23
Crystal
X2CKO
1
AVCC
1
AGND
SEL0
SEL1
SEL2
SELIO
External
Bus
Interface
1
ADVCC
WR0
Power
Supply
1
6
ADGND _{CP3UB26 WR1}
VCC _{(LQFP-144) RD}
6
GND
10
IOVCC
11
IOGND
PGO
PG1
GPIO _{Chip Reset}
RESET
PG3
GPIO
PG4
TMS
PG5
JTAG I/F to
Debugger/
Programmer
UART0
TDI
TDO
TCK
RDY
PE0/RXD0
PE1/TXD0
PE2/RTS
PE3/CTS
UART0
UART0/MFT _Mode
Selection
UART1/MIWU
MFT
UART2/MIWU
UART3/MIWU
ADC/
Touchscreen
Microwire/
SPI/
VTU
ENV0
ENV1
PE4/CKX/TB
ENV2
PH0/RXD1/WUI11
PG7/TA
ADC0/TSX+
ADC1/TSY+
ADC2/TSX-
ADC3/TSY-
PH1/TXD1/WUI12
PH2/RXD1/WUI13
PH3/TXD1/WUI14
PH4/RXD1/WUI15
PH5/TXD1/WUI16
ADC4/MUXOUT0
ADC5/MUXOUT1 _PF0/MSK/TIO1
ADC6
PF1/MDIDO/TIO2
ADC7/ADCIN _{PF2/MDODO/TIO3}
PJ7/ASYNC/
WUI9
PF3/MWCS/TIO4
VREFP
PF4/SCK/TIO5
UART0/MFT
UART1/MIWU
UART2/MIWU
UART3/MIWU
Microwire/
SPI/
VTU
AAI/
VTU ACCESS.bus
AAI/NMI _{CAN bus}
AAI
SDA
SCL
PH6/CANRX/
WUI17
PH7/CANTX
PF5/SFS/TIO6
PF6/STD/TIO7
PF7/SRD/TIO8
PE5/SRFS/NMI
PG2/SRCLK
AAI/
VTU
AAI/NMI
AAI
USB
D+
D-
UVCC
PJ0/WUI18
PJ1/WUI19
PJ2/WUI20
PJ3/WUI21
PJ4/WUI22
PJ5/WUI23
MIWU
USB
D+
D-
UVCC
PJ0/WUI18
PG6/WUI10
MIWU
UGND
PJ6/WUI24
PG6/WUI10
UGND
DS306
Some pins may be enabled as general-purpose I/O-port pins or as alternate functions associated with specific
peripherals or interfaces. These pins may be individually configured as port pins, even when the associated peripheral
or interface is enabled. Table 4-1 describes the device signals for the LQFP-128 package. Table 4-1 describes the
device signals for the LQFP-144 package.
Figure 4-1. CP3UB26 Device Signals
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SIGNAL DESCRIPTIONS
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