BQ25601 Datasheet, PDF (33/60 Pages) Texas Instruments – I2C Controlled 3-A, Single-Cell Battery Charger for High Input Voltage and Narrow Voltage DC (NVDC) Power Path Management

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8.5 Register Maps
I²C Slave Address: 6BH
8.5.1 REG00
Bit Field
7
EN_HIZ
6 EN_ICHG_MON[1]
5 EN_ICHG_MON[0]
4 IINDPM[4]
3 IINDPM[3]
2 IINDPM[2]
1 IINDPM[1]
0 IINDPM[0]
bq25601
SLUSCK5 – MARCH 2017
Table 5. REG00 Field Descriptions
POR Type Reset
Description
0
R/W
by REG_RST
by Watchdog
0 – Disable, 1 – Enable
0 R/W by REG_RST 00 - Enable STAT pin function
(default)
01 - Reserved
0
R/W by REG_RST ^{10 - Reserved}
11 - Disable STAT pin function
(float pin)
1 R/W by REG_RST 1600 mA
0 R/W by REG_RST 800 mA
1 R/W by REG_RST 400 mA
1 R/W by REG_RST 200 mA
1 R/W by REG_RST 100 mA
Comment
Enable HIZ Mode
0 – Disable (default)
1 – Enable
Input Current Limit
Offset: 100 mA
Range: 100 mA (000000) – 3.2 A
(11111)
Default:2400 mA (10111),
maximum input current limit, not
typical.
IINDPM bits are changed
automatically after input source
detection is completed
PSEL = Hi = 500 mA
PSEL = Lo = 2.4 A
Host can over-write IINDPM
register bits after input source
detection is completed.
LEGEND: R/W = Read/Write; R = Read only
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