BQ25601 Datasheet, PDF (11/60 Pages) Texas Instruments – I2C Controlled 3-A, Single-Cell Battery Charger for High Input Voltage and Narrow Voltage DC (NVDC) Power Path Management

bq25601
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SLUSCK5 – MARCH 2017
Electrical Characteristics (continued)
V_{VAC_UVLOZ} < V_VAC < V_{VAC_OV} and V_VAC > V_BAT + V_SLEEP, T_J = –40°C to 125°C and T_J = 25°C for typical values (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
CHARGE OVERCURRENT COMPARATOR (CYCLE-BY-CYCLE)
I_{HSFET_OCP}
HSFET cycle-by-cycle over-
current threshold
5.2
8.0
I_{BATFET_OCP}
System over load threshold
6.0
CHARGE UNDER-CURRENT COMPARATOR (CYCLE-BY-CYCLE)
V_{LSFET_UCP}
LSFET under-current falling
threshold
From sync mode to non-sync mode
160
PWM
f_SW
PWM switching frequency
D_MAX
Maximum PWM duty cycle⁽¹⁾
BOOST MODE OPERATION
Oscillator frequency, buck mode
Oscillator frequency, boost mode
1320
1150
1500
1412
97%
1680
1660
V_{OTG_REG}
Boost mode regulation voltage
V_VBAT = 3.8 V, I_(PMID) = 0 A,
BOOSTV[1:0] = '10' = 5.15 V
4.972
5.126
5.280
V_{OTG_REG_ACC}
Boost mode regulation voltage
accuracy
V_VBAT = 3.8 V, I_(PMID) = 0 A,
BOOSTV[1:0] = '10' = 5.15 V
-3
3
V_VBAT falling, MIN_V_BAT_SEL
(REG01[0]) = 0
2.6
2.8
2.9
V_{BATLOWV_OTG}
Battery voltage exiting boost
mode
V_VBAT rising, MIN_V_BAT_SEL
(REG01[0]) = 0
V_VBAT falling, MIN_V_BAT_SEL
(REG01[0]) = 1
2.9
3.0
3.15
2.4
2.5
2.6
V_VBAT rising, MIN_V_BAT_SEL
(REG01[0]) = 1
2.7
2.8
2.9
I_OTG
OTG mode output current
BOOST_LIM (REG02[7]) = 1
1.2
1.4
1.6
I_{OTG_OCP_ACC}
Boost mode RBFET over-current
protection accuracy
BOOST_LIM = 0.5 A (REG02[7] = 0)
0.5
0.722
V_{OTG_OVP}
I_{OTG_HSZCP}
OTG overvoltage threshold
HSFET under current falling
threshold
Rising threshold
5.55
5.8
6.15
100
REGN LDO
V_REGN
REGN LDO output voltage
V_VBUS = 9V, I_REGN = 40mA
V_REGN
REGN LDO output voltage
V_VBUS = 5V, I_REGN = 20mA
LOGIC I/O PIN CHARACTERISTICS (CE, PSEL, SCL, SDA,, INT)
5.6
6
6.55
4.6
4.7
4.8
V_ILO
Input low threshold CE
V_IH
Input high threshold CE
I_BIAS
High-level leakage current CE
V_ILO
Input low threshold PSEL
V_IH
Input high threshold PSEL
I_BIAS
High-level leakage current PSEL
LOGIC I/O PIN CHARACTERISTICS (PG, STAT)
Pull up rail 1.8 V
Pull up rail 1.8V
0.4
1.3
1
0.4
1.3
1
V_OL
Low-level output voltage
0.4
(1) Specified by design. Not production tested.
UNIT
A
A
mA
kHz
kHz
V
%
V
V
V
V
A
A
V
mA
V
V
V
V
µA
V
V
µA
V
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