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TMS320DM365_16 Datasheet, PDF (30/210 Pages) Texas Instruments – Digital Media System-on-Chip (DMSoC)
TMS320DM365
SPRS457E – MARCH 2009 – REVISED JUNE 2011
www.ti.com
Name
EM_A10 / GIO75 /
AECFG[2]
EM_A9 / GIO74 /
AECFG[1]
EM_A8 / GIO73 /
AECFG[0]
EM_A7 / GIO72 /
KEYA3
EM_A6 / GIO71 /
KEYA2
EM_A5 / GIO70 /
KEYA1
EM_A4 / GIO69 /
KEYA0
EM_A3 / GIO68 /
KEYB3
BGA
ID
U19
T18
T19
T17
R18
R16
R19
R15
Table 2-5. Pin Descriptions (continued)
Type Group
(1)
Power
Supply (2)
IPU Reset
IPD(3) State
Description (4)
I/O/Z
AEMIF /
GIO /
AECFG
[2]
VDD_AEMIF1_18_
33
IPU/IPD
disable
d by
default
Input
Async EMIF: Address Bus bit[10]
GIO: GIO[75]
AECFG[2]: See Section 3.2, Device Boot Modes and
Table 3-14, AECFG (Async EMIF Configuration) for
system usage of these pins.
I/O/Z
AEMIF /
GIO /
AECFG
[1]
VDD_AEMIF1_18_
33
IPU/IPD
disable
d by
default
Input
Async EMIF: Address Bus bit[09]
GIO: GIO[74]
AECFG[1]: See Section 3.2, Device Boot Modes and
Table 3-14, AECFG (Async EMIF Configuration) for
system usage of these pins.
I/O/Z
AEMIF /
GIO /
AECFG
[0]
VDD_AEMIF1_18_
33
IPU/IPD
disable
d by
default
Input
Async EMIF: Address Bus bit[08]
GIO: GIO[73]
AECFG[0]: See Section 3.2, Device Boot Modes and
Table 3-14, AECFG (Async EMIF Configuration) for
system usage of these pins.
I/O/Z
AEMIF /
GIO /
KEYSC
AN
VDD_AEMIF1_18_
33
I/O/Z
AEMIF /
GIO /
KEYSC
AN
VDD_AEMIF1_18_
33
I/O/Z
AEMIF /
GIO /
KEYSC
AN
VDD_AEMIF1_18_
33
I/O/Z
AEMIF / VDD_AEMIF1_18_
GIO/KE
33
YSCAN
I/O/Z
AEMIF /
GIO/
KEYSC
AN
VDD_AEMIF1_18_
33
Input Async EMIF: Address Bus bit[07]
Input
GIO: GIO[72]
Keyscan: A3
Async EMIF: Address Bus bit[06]
Input
GIO: GIO[71]
Keyscan: A2
Async EMIF: Address Bus bit[05]
Input
GIO: GIO[70]
Keyscan: A1
Async EMIF: Address Bus bit[04]
Input
GIO: GIO[69]
Keyscan: A0
Async EMIF: Address Bus bit[03]
GIO: GIO[68]
Keyscan: B3
30
Device Overview
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