TLK3101_16 Datasheet, PDF (3/28 Pages) Texas Instruments – 2.5 Gbps to 3.125 Gbps TRANSCEIVER

functional block diagram
LOOPEN
PRBSEN
TX_EN
TX_ER
TLK3101
2.5 Gbps to 3.125 Gbps TRANSCEIVER
SCAS649B − AUGUST 2000 − REVISED JANUARY 2008
PRBSEN
PRBS
Generator
10
2:1
MUX
10
Parallel to
Serial
DOUTTXP
DOUTTXN
TD(0−15)
8
10
MUX
8
10
10
Bit
Clock
Pre-Emphasis
Control
PREM
GTX_CLK
TESTEN
ENABLE
PRBSEN
Controls:
PLL,Bias,Rx,
Tx
RX_ER
PRBS_PASS
2:1
MUX
Multiplying
Clock
Synthesizer
Bit
Clock
Interpolator and
Clock Recovery
2:1
MUX
RX_CLK
RX_DV/LOS
RD(0−15)
PRBSEN
PRBS
Verification
Recovered
Clock
Comma
Detect
8 _{and 8B/10B} 10
Decoding
Comma
8
Detect
10
and 8B/10B
Decoding
1:2
MUX
10
Serial to
Parallel
2:1 Data
MUX
Signal Detect
(LOS)
DINRXP
DINRXN
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3