TMS320VC5504_13 Datasheet, PDF (29/123 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320VC5504
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SPRS609B – JUNE 2009 – REVISED JANUARY 2010
Table 3-16. GPIO Terminal Functions (continued)
SIGNAL
NAME
TYPE ⁽¹⁾ OTHER^{(2) (3)}
NO.
DESCRIPTION
UART_CTS/
GP[29]/
I2S3_FS
P13 I/O/Z
IPD
DV_DDIO
This pin is multiplexed between UART, GPIO, and I2S3.
For GPIO, it is general-purpose input/output pin 29 (GP[29]).
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
UART_RXD/
GP[30]/
I2S3_RX
N13 I/O/Z
IPD
DV_DDIO
This pin is multiplexed between UART, GPIO, and I2S3.
For GPIO, it is general-purpose input/output pin 30 (GP[30]).
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
UART_TXD/
GP[31]/
I2S3_DX
P14 I/O/Z
IPD
DV_DDIO
This pin is multiplexed between UART, GPIO, and I2S3.
For GPIO, it is general-purpose input/output pin 31 (GP[31]).
Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be
enabled or disabled via the PDINHIBR3 register.
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