TMS320VC5504_13 Datasheet, PDF (20/123 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320VC5504
SPRS609B – JUNE 2009 – REVISED JANUARY 2010
www.ti.com
Table 3-8. External Memory Interface (EMIF) Terminal Functions (continued)
SIGNAL
NAME
EM_D[15]
EM_D[14]
EM_D[13]
EM_D[12]
EM_D[11]
EM_D[10]
EM_D[9]
EM_D[8]
EM_D[7]
EM_D[6]
EM_D[5]
EM_D[4]
EM_D[3]
EM_D[2]
EM_D[1]
EM_D[0]
EM_CS5
EM_CS4
EM_CS3
EM_CS2
EM_WE
EM_OE
EM_R/W
EM_DQM1
EM_DQM0
EM_BA[1]
EM_BA[0]
EM_WAIT5
EM_WAIT4
EM_WAIT3
EM_WAIT2
TYPE ⁽¹⁾ OTHER^{(2) (3)}
NO.
DESCRIPTION
J4
K3
K4
L3
C4
D3
F4
E3
I/O/Z
H3
DV_DDEMIF EMIF 16-bit bi-directional bus.
K5
M2
L4
D4
F3
E5
G3
A3
O/Z
DV_DDEMIF
EMIF chip select 5 output for use with asynchronous memories (i.e., NOR flash,
NAND flash, or SRAM).
C3
O/Z
DV_DDEMIF
EMIF chip select 4 output for use with asynchronous memories (i.e., NOR flash,
NAND flash, or SRAM).
M4
O/Z
DV_DDEMIF
EMIF NAND chip select 3 output for use with asynchronous memories (i.e., NOR
flash, NAND flash, or SRAM).
C5
O/Z
DV_DDEMIF
EMIF NAND chip select 2 output for use with asynchronous memories (i.e., NOR
flash, NAND flash, or SRAM).
H1
O/Z
E4
O/Z
B6
O/Z
P1
O/Z
B5
O/Z
B1
O/Z
A1
O/Z
DV_DDEMIF
DV_DDEMIF
DV_DDEMIF
DV_DDEMIF
DV_DDEMIF
DV_DDEMIF
DV_DDEMIF
EMIF asynchronous memory write enable output
EMIF asynchronous memory read enable output
EMIF asynchronous read/write output
EMIF asynchronous data write strobes and byte enables.
EMIF asynchronous bank address
16-bit wide memory: EM_BA[1] forms the device address[0] and BA[0] forms device
address [23].
8-bit wide memory: EM_BA[1] forms the device address[1] and BA[0] forms device
address [0].
H4
I
G1
I
K6
I
D5
I
DV_DDEMIF
DV_DDEMIF
DV_DDEMIF
DV_DDEMIF
EMIF wait state extension input 5 for EM_CS5
EMIF wait state extension input 4 for EM_CS4
EMIF wait state extension input 3 for EM_CS3
EMIF wait state extension input 2 for EM_CS2
20
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