MSP430FR5739-EP_16 Datasheet, PDF (28/95 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR5739-EP
SLVSCN6A – NOVEMBER 2014 – REVISED DECEMBER 2014
www.ti.com
4.27 eUSCI (I²C Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4-10)
ƒ_eUSCI
PARAMETER
eUSCI input clock frequency
TEST CONDITIONS
Internal: SMCLK, ACLK
External: UCLK
Duty cycle = 50% ±10%
V_CC
MIN TYP MAX UNIT
ƒ_SYSTEM MHz
ƒ_SCL
t_HD,STA
t_SU,STA
t_HD,DAT
t_SU,DAT
t_SU,STO
SCL clock frequency
Hold time (repeated) START
Setup time for a repeated START
Data hold time
Data setup time
Setup time for STOP
ƒ_SCL = 100 kHz
ƒ_SCL > 100 kHz
ƒ_SCL = 100 kHz
ƒ_SCL > 100 kHz
ƒ_SCL = 100 kHz
ƒ_SCL > 100 kHz
UCGLITx = 0
2 V, 3 V
0
4.0
2 V, 3 V
0.6
4.7
2 V, 3 V
0.6
2 V, 3 V
0
2 V, 3 V
250
4.0
2 V, 3 V
0.6
50
400 kHz
µs
µs
ns
ns
µs
600 ns
t_SP
Pulse duration of spikes suppressed by
input filter
UCGLITx = 1
UCGLITx = 2
25
2 V, 3 V
12.5
300 ns
150 ns
UCGLITx = 3
6.25
75 ns
UCCLTOx = 1
27
ms
t_TIMEOUT Clock low timeout
UCCLTOx = 2
UCCLTOx = 3
2 V, 3 V
30
ms
33
ms
SDA
t_HD,STA
t_SU,STA
t_HD,STA
t_BUF
t_LOW
t_HIGH
t_SP
SCL
t_HD,DAT
t_SU,DAT
Figure 4-10. I²C Mode Timing
t_SU,STO
28
Specifications
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