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MSP430FR5739-EP_16 Datasheet, PDF (23/95 Pages) Texas Instruments – Mixed-Signal Microcontrollers
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MSP430FR5739-EP
SLVSCN6A – NOVEMBER 2014 – REVISED DECEMBER 2014
4.20 Timer_A
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
ƒTA
Timer_A input clock frequency
TEST CONDITIONS
Internal: SMCLK, ACLK
External: TACLK
Duty cycle = 50% ± 10%
VCC
2 V, 3 V
MIN TYP
tTA,cap
Timer_A capture timing
All capture inputs, Minimum pulse
duration required for capture
2 V, 3 V
20
MAX UNIT
24 MHz
ns
4.21 Timer_B
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
ƒTB
Timer_B input clock frequency
TEST CONDITIONS
Internal: SMCLK, ACLK
External: TBCLK
Duty cycle = 50% ± 10%
VCC
2 V, 3 V
MIN TYP
tTB,cap
Timer_B capture timing
All capture inputs, Minimum pulse
duration required for capture
2 V, 3 V
20
MAX UNIT
24 MHz
ns
4.22 eUSCI (UART Mode) Recommended Operating Conditions
PARAMETER
CONDITIONS
VCC
ƒeUSCI eUSCI input clock frequency
Internal: SMCLK, ACLK
External: UCLK
Duty cycle = 50% ± 10%
ƒBITCLK
BITCLK clock frequency
(equals baud rate in MBaud)
MIN TYP MAX UNIT
ƒSYSTEM MHz
5 MHz
4.23 eUSCI (UART Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
UCGLITx = 0
VCC
MIN TYP MAX UNIT
5
15
20
tt UART receive deglitch time(1)
UCGLITx = 1
UCGLITx = 2
2 V, 3 V
20
45
60
ns
35
80
120
UCGLITx = 3
50 110
180
(1) Pulses on the UART receive input (UCxRX) shorter than the UART receive deglitch time are suppressed. To ensure that pulses are
correctly recognized, their duration should exceed the maximum specification of the deglitch time.
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Specifications
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