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TDA2EG Datasheet, PDF (277/393 Pages) Texas Instruments – SoC for Advanced Driver Assistance Systems (ADAS) 23mm Package (ABC Package) Silicon Revision 2.0
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TDA2EG
SPRS958B – MARCH 2016 – REVISED JANUARY 2017
NOTE
The Controller Area Network Interface x (x = 1 to 2) is also referred to as DCANx.
Table 7-62, Table 7-63 and Figure 7-45 present timing and switching characteristics for DCANx Interface.
Table 7-62. Timing Requirements for DCANx Receive(1)
NO. PARAMETER
DESCRIPTION
f(baud)
Maximum programmable baud rate
1 tw(DCANRX)
Pulse duration, receive data bit (DCANx_RX)
(1) H = period of baud rate, 1/programmed baud rate.
MIN
H - 15
NOM
MAX
1
H + 15
UNIT
Mbps
ns
Table 7-63. Switching Characteristics Over Recommended Operating Conditions for DCANx Transmit (1)
NO. PARAMETER
DESCRIPTION
f(baud)
Maximum programmable baud rate
2 tw(DCANTX)
Pulse duration, transmit data bit (DCANx_TX)
(1) H = period of baud rate, 1/programmed baud rate.
MIN
H - 15
MAX
1
H + 15
UNIT
Mbps
ns
1
DCANx_RX
2
DCANx_TX
Figure 7-45. DCANx Timings
SPRS906_TIMING_DCAN_01
7.22 Ethernet Interface (GMAC_SW)
The three-port gigabit ethernet switch subsystem (GMAC_SW) provides ethernet packet communication
and can be configured as an ethernet switch. It provides the Gigabit Media Independent Interface (G/MII)
in MII mode, Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent
Interface (RMII), and the Management Data Input/Output (MDIO) for physical layer device (PHY)
management.
NOTE
For more information, see the Ethernet Subsystem section of the Device TRM.
NOTE
The Gigabit, Reduced and Media Independent Interface n (n = 0 to 1) are also referred to as
MIIn, RMIIn and RGMIIn.
CAUTION
The I/O timings provided in this section are valid only if signals within a single
IOSET are used. The IOSETs are defined in Table 7-68, Table 7-71, Table 7-
76 and Table 7-83.
Copyright © 2016–2017, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics 277
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