DRV401-Q1 Datasheet, PDF (27/39 Pages) Texas Instruments – DRV401-Q1 Sensor Signal Conditioning Device for Closed-Loop Magnetic Current Sensor

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DRV401-Q1
SBOS814 – DECEMBER 2016
Typical Application (continued)
8.2.2 Detailed Design Procedure
For gains of 4 V/V, Equation 2 shows the calculation:
R R +R
4= ² = ^{4 5}
R₁ R_SHUNT + R₃
(2)
With R₂ / R₁ = R₄ / R₃ = 4; R₅ = R_SHUNT × 4.
Typically, the gain error resulting from the resistance of R_SHUNT is negligible; for 70 dB of common-mode
rejection, however, the match of both divider ratios must be better than 1/3000.
The amplifier output may drive close to the supply rails, and is designed to drive the input of a successive-
approximation resistance (SAR)-type ADC; adding an RC low-pass filter stage between the DRV401-Q1 device
and the ADC is recommended. This filter limits the signal bandwidth and decouples the high-frequency
component of the converter input sampling noise from the amplifier output. For R_F and C_F values, see the
specific converter recommendations in the specific product data sheet. Empirical evaluation may be necessary to
obtain optimum results.
The output drives 100 pF directly and shows 50% overshoot with approximately 1-nF capacitance. Adding R_F
allows much larger capacitive loads, as shown in Figure 44 and Figure 45.
NOTE
Note that with an R_F value of only 20 Ω, the load capacitor must be smaller than 1 nF or
larger than 33 nF to avoid overshoot; with an R_F value of 50 Ω, this transient area is
avoided.
The reference input (REF_IN) is the reference node for the exact output signal (V_OUT). Connecting REF_IN to the
reference output (REF_OUT) results in a live zero reference voltage of 2.5 V. Using the same reference for REF_IN
and the ADC avoids mismatch errors that exist between two reference sources.
8.2.3 Application Curves
10 ms/div
R₅ = 20 Ω, C_D =
100 nF
Figure 44. Figure 44 Performance (V_OUT)
10 ms/div
R₅ = 50 Ω, C_D = 10
nF
Figure 45. Figure 45 Performance (V_OUT)
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