TLC5929 Datasheet, PDF (26/36 Pages) Texas Instruments – 16-Channel, Constant-Current LED Driver with 7-Bit Global Brightness Control, Power-Save Mode

TLC5929
SBVS159 – APRIL 2011
www.ti.com
SIDLD in
Control Data
‘01’
Latch (Internal)
BLANK
High
Current set by external
resistor and BC data
OUTn Current
for LED Lighting
0mA
Output current selected by
IDMCUR in the function control latch.
OUTn current
for IDM
0mA
Low
Programmed Output Current
2/10/20 mA
0mA
When the BLANK signal is high, all outputs
are forced off, even if the IDM on-time has
not yet elapsed.
2/10/20 mA
0mA
SID Holder
Data (Internal)
On-time selected by IDMTIM
in the function control latch.
LOD
Previous Data
LOD data are held in SID holder when
BLANK is high or when the IDM working
time elapses .
LOD
XXXXh
LOD
XXXXh
16-Bit LOD
Detector Output
Data (Internal)
LAT
LOD
0000h
LOD data go to SID holder when BLANK is low or when the IDM working time has not yet elapsed.
LOD
XXXXh
LOD
0000h
LOD
XXXXh
LOD
0000h
LOD data are unstable
immediately after
BLANK goes low.
LOD detector output data are all '0' when IDM working time elapses .
17-Bit Common
Shift Register
Data (internal)
Latched Output On/Off Data
LOD is Loaded into the Shift Register
Figure 27. IDM Operation Timing with LOD Selected and IDM Enabled
SIDLD in
Control Data
‘01’
Latch (Internal)
BLANK
OUTn Current
for LED Lighting
High
Current set by external
resistor and BC data
0mA
OUTn current
for IDM
0mA
SID Holder
Data (Internal)
LOD
Previous Data
16-Bit LOD
Detector Output
Data (Internal)
LOD
0000h
LAT
Low
Programmed Output Current
The output for IDM
is not turned on because
IDM is disabled by
the IDMCUR bit setting.
0mA
0mA
0mA
When the BLANK signal is high, all outputs
are forced off, even if the IDM on-time has
not yet elapsed.
LOD
XXXXh
LOD data go to SID holder when BLANK is low.
LOD
XXXXh
LOD data are unstable
immediately after BLANK
goes low.
LOD
0000h
LOD data are held in SID holder
when BLANK is high.
LOD
XXXXh
LOD
XXXXh
LOD
0000h
LOD detector output data are
all '0' when BLANK is high.
17-Bit Common
Shift Register
Data (internal)
Latched On/Off Control Data
LOD is Loaded into the Shift Register
Figure 28. IDM Operation Timing with LOD Selected and IDM Disabled
26
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