TLC5929 Datasheet, PDF (11/36 Pages) Texas Instruments – 16-Channel, Constant-Current LED Driver with 7-Bit Global Brightness Control, Power-Save Mode

TLC5929
www.ti.com
PIN
NAME
NO.
BLANK
21
IREF
23
LAT
4
GND
1
OUT0
5
OUT1
6
OUT2
7
OUT3
8
OUT4
9
OUT5
10
OUT6
11
OUT7
12
OUT8
13
OUT9
14
OUT10
15
OUT11
16
OUT12
17
OUT13
18
OUT14
19
OUT15
20
SCLK
3
SIN
2
SOUT
22
VCC
24
PIN DESCRIPTIONS
SBVS159 – APRIL 2011
I/O
DESCRIPTION
Blank all outputs. When BLANK is high, all constant-current outputs (OUT0 to OUT15) are forced off.
I When BLANK is low, all constant-current outputs are controlled by the on/off control data in the data
latch.
Maximum current programming terminal. A resistor connected between IREF and GND sets the
I/O
maximum current for every constant-current output. When this terminal is directly connected to GND,
all outputs are forced off. The external resistor should be placed close to the device and must be in the
range of 1.32 kΩ to 66.0 kΩ.
Data latch. The rising edge of LAT latches the data from the common shift register into the output
I
on/off data latch. At the same time, the data in the common shift register are replaced with SID, which
is selected by SIDLD. See the Output On/Off Data Latch section and Status Information Data (SID)
section for more details.
— Ground
O
O
O
O
O
O
O
O _{Constant-current sink outputs. Multiple outputs can be configured in parallel to increase the}
O ^{constant-current capability. Different voltages can be applied to each output.}
O
O
O
O
O
O
O
Serial data shift clock. Data present on SIN are shifted to the LSB of the 17-bit shift register with the
I SCLK rising edge. Data in the shift register are shifted toward the MSB at each SCLK rising edge. The
MSB data of the common shift register appear on SOUT.
I
Serial data input for the 17-bit common shift register. When SIN is high, a '1' is written to the LSB of
the common shift register at the rising edge of SCLK.
O
Serial data output of the 17-bit common shift register. SOUT is connected to the MSB of the 17-bit shift
register. Data are clocked out at the rising edge of SCLK.
— Power-supply voltage
Copyright © 2011, Texas Instruments Incorporated
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