TLC5929 Datasheet, PDF (19/36 Pages) Texas Instruments – 16-Channel, Constant-Current LED Driver with 7-Bit Global Brightness Control, Power-Save Mode

TLC5929
www.ti.com
SBVS159 – APRIL 2011
Function Control Data Latch
The function control data latch is 16 bits long and contains the global brightness control (BC) data, status
information data (SID) load control data, LED short detection (LSD) voltage level data, the current value of the
invisible detection mode (IDM), IDM working time, and power-save mode enable control data.
When the device is powered up, the data in this data latch are set to the default values shown in Table 4. This
table contains the bit names, numbers and descriptions.
The function control data latch configuration is shown in Figure 22. Table 4 lists the bit descriptions.
From Common Shift Register
Control Data Latch (16 Bits)
16 Bits
MSB
Power- IDM IDM IDM IDM LSD LSD SID SID Brightness
Save Working Working Current Current Detect Detect Load Load Control
Enable Time 1 Time 0 Select 1 Select 0 Voltage 1 Voltage 0 Control 1 Control 0 (BC) 6
15
14
13
12
11
10
9
8
7
6
LSB
Brightness
Control
(BC) 0
0
1 Bit
2 Bits
2 Bits
2 Bits
2 Bits
7 Bits
To
To
Power-Save
IDM
Mode Working Time
Control Circuit Control Circuit
To
IDM
Current
Control Circuit
To
LSD
Circuit
To
SID
Data Load
Control Circuit
To
Output
Constant-Current
Control Circuit
Figure 22. Function Control Data Latch Configuration
BIT
NUMBER
[6:0]
[8:7]
[10:9]
[12:11]
[14:13]
[15]
Table 4. Function Control Data Latch Bit Description
BIT
NAME
BCALL
SIDLD
LSDVLT
IDMCUR
IDMTIM
PSMODE
DEFAULT
VALUE
(BINARY)
1111111
00
11
00
11
1
DESCRIPTION
Global brightness control. These seven bits control the current of all outputs
with 128 steps between 0% to 100% of the maximum current value set by the
external resistor. Table 2 shows the current value truth table.
SID load control. These two bits select the SID loaded to the common register
when the LAT pulse is input for on/off data writing (MSB of the common shift
register must be '0'). Table 6 shows the selected data truth table.
LSD detection voltage select. These two bits select the detection threshold
voltage for the LED short detection (LSD). Table 7 shows the detect voltage
truth table.
IDM current select. These two bits select the sink current at OUTn for the IDM
to detect the LED open detection (LOD) or the LED short detection (LSD)
without visible lighting. Table 8 shows the current value truth table. Figure 27
and Figure 28 show the IDM operation timing.
IDM working time select. These two bits select the time of the IDMCUR output
sink current at OUTn to detect the LED open detection (LOD) or LED short
detection (LSD) without visible light. Table 9 shows the work-time truth table.
Figure 27 and Figure 28 show the IDM operation timing.
Power save mode enable. This bit enables or disables the power-save mode.
When the mode is enabled (PSMODE = '1'), the device goes into power-save
mode if all data in the on/off data latch are '0'. Table 10 shows the power-save
mode truth table. Figure 25 shows the power-save mode operation timing.
Output On/Off Data Write Timing and Output Control
When the 17-bit shift register MSB is '0', the output on/off data latch can be updated with the lower 16 bits of
data in the shift register at the rising edge of the LAT signal, after the data are stored in the shift register using
the SIN and SCLK signals. When the output on/off data latch is updated, SID (selected by the SIDLD bit) is
loaded into the shift register, except when SIDLD = '00' (see Table 6). The output on/off data write timing is
shown in Figure 23.
Copyright © 2011, Texas Instruments Incorporated
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