OMAP3530_14 Datasheet, PDF (254/266 Pages) Texas Instruments – Applications Processors

OMAP3530, OMAP3525
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
Table 6-150. JTAG Timing Conditions – Adaptive Clock Mode (continued)
Output Conditions
C_LOAD
TIMING CONDITION PARAMETER
Output load capacitance
VALUE
30
UNIT
pF
Table 6-151. JTAG Timing Requirements – Adaptive Clock Mode⁽¹⁾
NO.
PARAMETER
1.15 V
JA4
JA5
JA6
JA7
JA8
JA9
JA10
t_c(tck)
t_w(tckL)
t_w(tckH)
t_dc(lclk)
t_j(lclk)
t_{su(tdiV-tckH)}
t_h(tdiV-tckH)
t_{su(tmsV-tckH)}
t_h(tmsV-tckH)
Cycle time⁽²⁾, jtag_tck period
Typical pulse duration, jtag_tck low
Typical pulse duration, jtag_tck high
Duty cycle error, jtag_tck
Cycle jitter⁽⁴⁾, jtag_tck
Setup time, jtag_tdi valid before jtag_tck high
Hold time, jtag_tdi valid after jtag_tck high
Setup time, jtag_tms valid before jtag_tck high
Hold time, jtag_tms valid after jtag_tck high
MIN
MAX
50
0.5*P ⁽³⁾
0.5*P ⁽³⁾
–2500
2500
–1500
1500
13.8
13.8
13.8
13.8
(1) The timing requirements are assured for the cycle jitter and duty cycle error conditions specified.
(2) Related with the input maximum frequency supported by the JTAG module.
(3) P = jtag _tck period in ns.
(4) Maximum cycle jitter supported by jtag _tck input clock.
1.0 V
MIN
MAX
50
0.5*P ⁽³⁾
0.5*P ⁽³⁾
–2500
2500
–1500
1500
13.8
13.8
13.8
13.8
UNIT
ns
ns
ns
ps
ps
ns
ns
ns
ns
Table 6-152. JTAG Switching Characteristics – Adaptive Clock Mode
NO. PARAMETER
JA1
t_c(rtck)
Cycle time⁽¹⁾, jtag_rtck period
JA2
t_w(rtckL)
Typical pulse duration, jtag_rtck low
JA3
t_w(rtckH)
Typical pulse duration, jtag_rtck high
t_dc(rtck)
t_j(rtck)
Duty cycle error, jtag_rtck
Jitter standard deviation⁽³⁾, jtag_rtck
t_R(rtck)
Rise time, jtag_rtck
t_F(rtck)
Fall time, jtag_rtck
JA11 t_{d(rtckL-tdoV)}
Delay time, jtag_rtck low to jtag_tdo valid
t_R(tdo)
Rise time, jtag_tdo,
t_F(tdo)
Fall time, jtag_tdo
(1) Related with the jtag _rtck maximum frequency programmable.
(2) PO = jtag _rtck period in ns.
(3) The jitter probability density can be approximated by a Gaussian function.
1.15 V
MIN
MAX
50
0.5*PO ⁽²⁾
0.5*PO ⁽²⁾
–2500
2500
33.3
4
4
–14.6
14.6
4
4
1.0 V
MIN
MAX
50
0.5*PO ⁽²⁾
0.5*PO ⁽²⁾
–2500
2500
33.3
4
4
–14.6
14.6
4
4
UNIT
ns
ns
ns
ps
ps
ns
ns
ns
ns
ns
254 TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
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