SM320C6472-HIREL Datasheet, PDF (252/264 Pages) Texas Instruments – SM320C6472 Fixed-Point Digital Signal Processor

SM320C6472-HiRel
SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010
HEX ADDRESS RANGE
02D0 08A8
02D0 08AC
02D0 08B0
02D0 08B4
02D0 08B8
02D0 08BC
02D0 08C0
02D0 08C4
02D0 08C8
02D0 08CC
02D0 08D0
02D0 08D4
02D0 08D8
02D0 08DC
02D0 08E0
02D0 08E4
02D0 08E8
02D0 08EC
02D0 08F0
02D0 08F4
02D0 08F8
02D0 08FC
02D0 0900
02D0 0904
02D0 0908
02D0 090C
02D0 0910
02D0 0914
02D0 0918
02D0 091C
02D0 0920
02D0 0924
02D0 0928
02D0 092C
02D0 0930
02D0 0934
02D0 0938
02D0 093C
02D0 0940 - 02D0 09FC
02D0 1000
02D0 1004
02D0 1008
02D0 100C
02D0 1010
02D0 1014
02D0 1018
Table 7-150. RapidIO Control Registers (continued)
ACRONYM
REGISTER NAME
RXU_MAP_L21
Mailbox-to-Queue Mapping Register L21
RXU_MAP_H21
Mailbox-to-Queue Mapping Register H21
RXU_MAP_L22
Mailbox-to-Queue Mapping Register L22
RXU_MAP_H22
Mailbox-to-Queue Mapping Register H22
RXU_MAP_L23
Mailbox-to-Queue Mapping Register L23
RXU_MAP_H23
Mailbox-to-Queue Mapping Register H23
RXU_MAP_L24
Mailbox-to-Queue Mapping Register L24
RXU_MAP_H24
Mailbox-to-Queue Mapping Register H24
RXU_MAP_L25
Mailbox-to-Queue Mapping Register L25
RXU_MAP_H25
Mailbox-to-Queue Mapping Register H25
RXU_MAP_L26
Mailbox-to-Queue Mapping Register L26
RXU_MAP_H26
Mailbox-to-Queue Mapping Register H26
RXU_MAP_L27
Mailbox-to-Queue Mapping Register L27
RXU_MAP_H27
Mailbox-to-Queue Mapping Register H27
RXU_MAP_L28
Mailbox-to-Queue Mapping Register L28
RXU_MAP_H28
Mailbox-to-Queue Mapping Register H28
RXU_MAP_L29
Mailbox-to-Queue Mapping Register L29
RXU_MAP_H29
Mailbox-to-Queue Mapping Register H29
RXU_MAP_L30
Mailbox-to-Queue Mapping Register L30
RXU_MAP_H30
Mailbox-to-Queue Mapping Register H30
RXU_MAP_L31
Mailbox-to-Queue Mapping Register L31
RXU_MAP_H31
Mailbox-to-Queue Mapping Register H31
FLOW_CNTL0
Flow Control Table Entry Register 0
FLOW_CNTL1
Flow Control Table Entry Register 1
FLOW_CNTL2
Flow Control Table Entry Register 2
FLOW_CNTL3
Flow Control Table Entry Register 3
FLOW_CNTL4
Flow Control Table Entry Register 4
FLOW_CNTL5
Flow Control Table Entry Register 5
FLOW_CNTL6
Flow Control Table Entry Register 6
FLOW_CNTL7
Flow Control Table Entry Register 7
FLOW_CNTL8
Flow Control Table Entry Register 8
FLOW_CNTL9
Flow Control Table Entry Register 9
FLOW_CNTL10
Flow Control Table Entry Register 10
FLOW_CNTL11
Flow Control Table Entry Register 11
FLOW_CNTL12
Flow Control Table Entry Register 12
FLOW_CNTL13
Flow Control Table Entry Register 13
FLOW_CNTL14
Flow Control Table Entry Register 14
FLOW_CNTL15
Flow Control Table Entry Register 15
-
Reserved
RapidIO Peripheral-Specific Registers
DEV_ID
Device Identity CAR
DEV_INFO
Device Information CAR
ASBLY_ID
Assembly Identity CAR
ASBLY_INFO
Assembly Information CAR
PE_FEAT
Processing Element Features CAR
-
Reserved
SRC_OP
Source Operations CAR
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252 C64x+ Peripheral Information and Electrical Specifications
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