SM320C6472-HIREL Datasheet, PDF (221/264 Pages) Texas Instruments – SM320C6472 Fixed-Point Digital Signal Processor

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SM320C6472-HiRel
SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010
HEX ADDRESS RANGE
02CC 0504
02CC 0508
02CC 050C - 02CC 05FC
02CC 0600
02CC 0604
02CC 0608
02CC 060C
02CC 0610
02CC 0614
02CC 0618
02CC 061C
02CC 0620
02CC 0624
02CC 0628
02CC 062C
02CC 0630
02CC 0634
02CC 0638
02CC 063C
02CC 0640
02CC 0644
02CC 0648
02CC 064C
02CC 0650
02CC 0654
02CC 0658
02CC 065C
02CC 0660
02CC 0664
02CC 0668
02CC 066C
02CC 0670
02CC 0674
02CC 0678
02CC 067C
02CC 0680 - 02CC 0FFC
Table 7-103. EMAC1 Control Registers (continued)
ACRONYM
MACADDRHI
MACINDEX
-
TX0HDP
TX1HDP
TX2HDP
TX3HDP
TX4HDP
TX5HDP
TX6HDP
TX7HDP
RX0HDP
RX1HDP
RX2HDP
RX3HDP
RX4HDP
RX5HDP
RX6HDP
RX7HDP
TX0CP
TX1CP
TX2CP
TX3CP
TX4CP
TX5CP
TX6CP
TX7CP
RX0CP
RX1CP
RX2CP
RX3CP
RX4CP
RX5CP
RX6CP
RX7CP
-
REGISTER NAME
MAC Address High Bytes Register (Used in Receive Address
Matching)
MAC Index Register
Reserved
Transmit Channel 0 DMA Head Descriptor Pointer Register
Transmit Channel 1 DMA Head Descriptor Pointer Register
Transmit Channel 2 DMA Head Descriptor Pointer Register
Transmit Channel 3 DMA Head Descriptor Pointer Register
Transmit Channel 4 DMA Head Descriptor Pointer Register
Transmit Channel 5 DMA Head Descriptor Pointer Register
Transmit Channel 6 DMA Head Descriptor Pointer Register
Transmit Channel 7 DMA Head Descriptor Pointer Register
Receive Channel 0 DMA Head Descriptor Pointer Register
Receive Channel 1 DMA Head Descriptor Pointer Register
Receive Channel 2 DMA Head Descriptor Pointer Register
Receive Channel 3 DMA Head Descriptor Pointer Register
Receive Channel 4 DMA Head Descriptor Pointer Register
Receive Channel 5 DMA Head Descriptor Pointer Register
Receive Channel 6 DMA Head Descriptor Pointer Register
Receive Channel 7 DMA Head Descriptor Pointer Register
Transmit Channel 0 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 1 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 2 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 3 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 4 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 5 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 6 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 7 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 0 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 1 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 2 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 3 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 4 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 5 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 6 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 7 Completion Pointer (Interrupt Acknowledge)
Register
Reserved
Copyright © 2010, Texas Instruments Incorporated
C64x+ Peripheral Information and Electrical Specifications 221
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