LM3S812_16 Datasheet, PDF (231/590 Pages) Texas Instruments – Stellaris LM3S812 Microcontroller

7.1 Block Diagram
Figure 7-1. GPIO Module Block Diagram
PA0
U0Rx
UART0
PA1
U0Tx
PA2
SSIClk
PA3
SSIFss
SSI
PA4
SSIRx
PA5
SSITx
PB0
CCP0 Timer0 CCP1
PB1
PB2
PB3
I2CSCL
I2CSDA
I²C
PB4
C0-
PB5
Analog
Comparator
C0o
PB6
C0+
PB7
JTAG
Stellaris^® LM3S812 Microcontroller
PE0
PE1
PE2
PE3
Fault
PWM0
PWM0
PWM1
PD0
PD1
UART1
U1Rx
U1Tx
PD2
PD3
PD4
CCP3 Timer1
CCP2
PD5
PD6
PD7
GPIO Port C
7.2 Signal Description
GPIO signals have alternate hardware functions. Table 7-3 on page 233 lists the GPIO pins and their
analog and digital alternate functions. The AINx analog signals are not 5-V tolerant and go through
an isolation circuit before reaching their circuitry. These signals are configured by clearing the
corresponding DEN bit in the GPIO Digital Enable (GPIODEN) register. Other analog signals are
5-V tolerant and are connected directly to their circuitry (C0-, C0+). These signals are configured
by clearing the DEN bit in the GPIO Digital Enable (GPIODEN) register. The digital alternate hardware
functions are enabled by setting the appropriate bit in the GPIO Alternate Function Select
(GPIOAFSEL) and GPIODEN registers and configuring the PMCx bit field in the GPIO Port Control
July 14, 2014
231
Texas Instruments-Production Data