DS92LX1621 Datasheet, PDF (23/44 Pages) National Semiconductor (TI) – 10 - 50 MHz Channel Link III Serializer and Deserializer with Embedded Bi-Directional Control Channel

TABLE 2. DS92LX1622 Control Registers
Addr
(Hex)
0
1
2
Name
I₂C Device ID
Reset
Reserved
Auto Clock
OSS Select
SSCG
Bits
Field
R/W
7:1 DEVICE ID
RW
0 DES ID
RW
7:3 RESERVED
2 REM_WAKEUP RW
1 DIGITALRESET0 RW
0 DIGITALRESET1 RW
7:6
5 AUTO_CLOCK
RW
4 OSS_SEL
RW
3:0 SSCG
Default
Description
0x60h
0
0
0 self
clear
0 self
clear
0
0
0
7-bit address of Deserializer;
0x60h
(1100_000X) default
0: Device ID is from CAD
1: Register I₂C Device ID overrides CAD
Reserved
Remote Wake-up Select
1: Enable. Generate remote wakeup signal automatically
wake-up the Serializer in Standby mode
0: Disable. Puts the Serializer (M/S = 0) in Standby mode
when Deserializer M/S = 1
1: Resets the device to default register values. Does not
affect device I2C Bus or Device ID
1: Digital Reset, retains all register values
Reserved
1: Output PCLK or Internal 25 MHz Oscillator clock
0: Only PCLK when valid PCLK present
Output Sleep State Select
0: Outputs = LOW , when LOCK = L
1: Outputs = TRI-STATE®, when LOCK = L
SSCG Select
0000: Normal Operation, SSCG OFF
0001: fmod (KHz) PCLK/2168, fdev ±0.50%
0010: fmod (KHz) PCLK/2168, fdev ±1.00%
0011: fmod (KHz) PCLK/2168, fdev ±1.50%
0100: fmod (KHz) PCLK/2168, fdev ±2.00%
0101: fmod (KHz) PCLK/1300, fdev ±0.50%
0110: fmod (KHz) PCLK/1300, fdev ±1.00%
0111: fmod (KHz) PCLK/1300, fdev ±1.50%
1000: fmod (KHz) PCLK/1300, fdev ±2.00%
1001: fmod (KHz) PCLK/868, fdev ±0.50%
1010: fmod (KHz) PCLK/868, fdev ±1.00%
1011: fmod (KHz) PCLK/868, fdev ±1.50%
1100: fmod (KHz) PCLK/868, fdev ±2.00%
1101: fmod (KHz) PCLK/650, fdev ±0.50%
1110: fmod (KHz) PCLK/650, fdev ±1.00%
1111: fmod (KHz) PCLK/650, fdev +/-1.50%
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