DDC232_15 Datasheet, PDF (23/34 Pages) Texas Instruments – 32-Channel, Current-Input Analog-to-Digital Converter

DDC232
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RETRIEVAL AFTER CONV TOGGLES
(CONTINUOUS MODE)
For shorter integration times, more time is available if
data retrieval begins after CONV toggles and ends
before the new data are ready. Data retrieval must
wait t_SDCV after CONV toggles before beginning. See
Figure 21 for an example of this. The maximum time
available for retrieval is t_CMDR – (t_SDCV + t_HDDODV),
regardless of t_INT. The maximum number of DDC232s
that can be daisy-chained together with Format = 1 is
calculated by Equation 3:
SBAS331D – AUGUST 2004 – REVISED APRIL 2010
266ms
(20 32)t_DCLK
(3)
NOTE: (16 × 32)t_DCLK is for Format = 0.
For DCLK = 10MHz, the maximum number of
DDC232s is four (or five for Format = 0).
CONV
DVALID
t_SDCV
DCLK
DOUT
t_INT
t_CMDR
…
…
Side A
Data
t_INT
t_HDDODV
…
…
Side B
Data
t_INT
…
…
Side A
Data
Figure 21. Readback After CONV Toggles
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