LMH7322_14 Datasheet, PDF (22/33 Pages) Texas Instruments – Dual 700 ps High Speed Comparator with RSPECL Outputs

LMH7322
SNOSAU8H – MARCH 2007 – REVISED MAY 2011
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mV
Vref
time
1
time
0
1
time
0
t=0
t=1
Oscillations & Noise
Figure 31. Oscillations on Output Signal
In most circumstances this is not an option because the slew rate of the input signal will vary.
Using Hysteresis
Hysteresis can be introduced to avoid oscillations, e.g. due to noise on the input signal, especially for slow
edges. For this purpose the switching level without hysteresis (V_REF) is forced to a new level (A or B) at the
moment the input signal crosses one of these levels. This can be seen in Figure 32.
mV
A
Vref
B
1
0
t=0
t=1
Figure 32. Hysteresis
In this picture the two dotted lines A and B, represent the resulting reference level at which the comparator will
compare the input level against. Assume that for this situation the input signal is connected to the negative input
and the switching level (V_REF) to the positive input. The input level drawn in Figure 32 starts much lower as the
reference level and this means that the input stage is well defined with the inverting input much lower than the
non-inverting input. As a result the output will be in the high state. Internally the switching level is at level A, with
the input signal sloping up, this situation remains until V_IN crosses level A at t=1. Now the output toggles, and the
internal switching level is lowered to level B. So before the output has the possibility to toggle again, the voltage
difference between the inputs is sufficient to have a stable situation again. When the input signal comes down
from high to low, the situation is stable until level B is reached at t=0. At this moment the output will toggle back,
and the circuit returns to the starting situation with the inverting input at a much lower level than the non inverting
input. Varying the levels A and B due to the change of the hysteresis resistor will also vary the timing of t=0 and
t=1. When designing a circuit be aware of this effect. Introducing hysteresis will cause some time shift between
output and input (e.g. duty cycle variations), but will eliminate undesired switching of the output.
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