LMH7322_14 Datasheet, PDF (15/33 Pages) Texas Instruments – Dual 700 ps High Speed Comparator with RSPECL Outputs

LMH7322
www.ti.com
Pin
Name
8.
INA+
9.
RHREFA
10. RHREFB
11. INB+
12. INB−
13. RHYSB
14. VCCIB
15. VEEB
16. LEB
17. LEB
18. VCCOB
19. QB
20. QB
21. VCCOB
22. VCCOA
23. QA
24. QA
25. DAP
SNOSAU8H – MARCH 2007 – REVISED MAY 2011
Table 2. PIN DESCRIPTIONS (continued)
Description
Positive Input
part A
Reference Voltage Hysteresis
Resistor
Reference Voltage Hysteresis
Resistor
Positive Input
part A
part B
part B
Negative Input
part B
Hysteresis Resistor
part B
Positive Supply for Input Stage part B
Negative Supply
part B
Latch Enable Input Not
part B
Latch Enable Input Logic
part B
Positive Supply for Output
Stage
part B
Inverted Output
part B
Output
part B
Positive Supply for Output
Stage
part B
Positive Supply for Output
Stage
part A
Output
part A
Inverted Output
part A
Central pad at the bottom of the A & B
package
Comment
Input for analog voltages between 200 mV below VEEA and 2V below
VCCIA.
The hysteresis voltage is determined by connecting a resistor from this
pin to RHYSA.
The hysteresis voltage is determined by connecting a resistor from this
pin to RHYSB.
Input for analog voltages between 200 mV below VEEB and 2V below
VCCIB.
Input for analog voltages between 200 mV below VEEB and 2V below
VCCIB.
The hysteresis voltage is determined by connecting a resistor from this
pin to RHREFB.
The supply pin for the input stage is independent of the supply for the
output stage.
The supply pin for the negative supply is connected to the VEEA via a
string of two anti-parallel diodes (see Figure 17).
Logic ‘0’ sets the part on hold. Logic levels are RSPECL compatible.
‘1’ sets the part on hold. Logic levels are RSPECL compatible.
The supply pin for the output stage is independent of the supply pin for
the input pin. This allows output levels of different logic families.
Output levels are determined by the choice of VCCOB.
Output levels are determined by the choice of VCCOB.
See other VCCOB
See other VCCOA.
Output levels are determined by the choice of VCCOA.
Output levels are determined by the choice of VCCOA.
This pad is connected to the VEE pins and its purpose is to transfer
heat outside the part.
Tips & Tricks Using the LMH7322
In this section several aspects are discussed concerning special applications using the LMH7322.
This concerns the LE function, the connection of the DAP in conjunction to the V_EE pins and the use of this part
as an interface between several logic families.
The Latch Enable Pins
The latch function is intended to stop the device from comparing the signals on both input pins. If the latch
function is enabled, the output is frozen and the logic information on the output pins, present at that moment, is
held until the latch function is disabled. The timing of this process can be seen in Figure 20. The input levels for
the latch pins should comply with RSPECL, but can also be driven with PECL type of signals if the minimum
supply (V_CCO –V_EE) is larger or equal to 3.3V. The minimum differential latch input voltage should be 100 mV.
Another possibility to set the LE function in a steady state is to connect the pins via a resistor to the power
supply. If the LE pin is connected to V_EE via a resistor of 10 kΩ and the LE-not pin is connected via 10 kΩ to the
V_CCO pin the part is continuously on. Since the latch input stage is referenced to V_CCO, the resistors to set the LE
function should be connected to this voltage. This is very important when working with different voltages for V_CCI
and V_CCO. If connected to the wrong supply, the latch function will not work.
Copyright © 2007–2011, Texas Instruments Incorporated
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