BQ40Z60_16 Datasheet, PDF (22/47 Pages) Texas Instruments – Programmable Battery Management Unit

bq40z60
SLUSAW3C – DECEMBER 2014 – REVISED JULY 2015
Feature Description (continued)
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Figure 2. Internal Power Source Selection
In the event of a power-cycle, the bq40z60 AFE will hold its internal RESET output pin high for t_RST duration to
allow its internal 1.8-V LDO and LFO to stabilize before running the analog gas gauge (AGG). The AFE enters
power-on reset when the voltage at V_REG falls below V_REGIT–, and exits reset when V_REG rises above V_REGIT– +
V_HYS for t_RST time. After t_RST, the bq40z60 AGG writes its trim values to the AFE.
1.8-V Regulator ^VIT+
t_OSU
t_RST
normal operation
(untrimmed)
normal operation
(trimmed)
VIT–
LFO
AFE RESET
AGG writes trim values to
AFE
Figure 3. Power-On Reset Operation
The bq40z60 AFE includes a low frequency oscillator (LFO) running at 262.144 kHz. The AFE monitors the LFO
frequency and indicates a failure via LATCH_STATUS[LFO] if the output frequency is much lower than normal.
The bq40z60 AFE provides two internal voltage references: V_REF1, used by the ADC and CC, and V_REF2 used by
the LDO, LFO, current wake comparator, and over- and short-current protection circuitry.
9.3.2.1 Wake Up Comparator
The internal wake comparator can be used to wake the bq40z60 from a HALT state if a configurable threshold is
detected across SRP and SRN.
9.3.2.2 Cell Balancing Support
The integrated cell balancing FETs included in the bq40z60 device allow the AFE to bypass cell current around a
given cell or numerous cells to effectively balance the entire battery stack. External series resistors placed
between the cell connections and the VCx input pins set the balancing current magnitude. The cell balancing
circuitry can be enabled or disabled via the CELL_BAL_DET[CB3, CB2, CB1] control register. Series input
resistors between 100 Ω and 1 kΩ are recommended for effective cell balancing.
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