BQ26100_15 Datasheet, PDF (22/29 Pages) Texas Instruments – Based Security and Authentication IC

bq26100
SLUS696B – JUNE 2006 – REVISED AUGUST 2015
10 Layout
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10.1 Layout Guidelines
The bq26100 device requires a single-signal trace for the SDQ line and the parasitic capacitor on the PWR input.
The best practice is to place the PWR capacitor as close as possible to the device with no via between the
capacitor and the PWR pin. There should be two vias connecting the ground plane to VSS pins at the capacitor
and additional vias connecting the ground plane to the remainder of ground connection for the thermal pad.
10.2 Layout Example
Figure 26. Board Layout Example
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