BQ26100_15 Datasheet, PDF (18/29 Pages) Texas Instruments – Based Security and Authentication IC

bq26100
SLUS696B – JUNE 2006 – REVISED AUGUST 2015
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7.6 Register Maps
7.6.1 Volatile Register Memory
The register memory is intended for in-field programming.
7.6.1.1 Message and Digest Registers – Memory Function Command 0xDD (Read) and 0x22 (Write)
The message is a 160-bit input to the HMAC calculation, and the digest is the 160-bit output of the HMAC
calculation. The message and digest share the same memory space, meaning that the message cannot be read
back once the digest has been computed. The MSB of the message should be written to address 0x0013, and
the LSB written to address 0x0000. The digest overwrites the message in the following manner.
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Table 6. Message/Digest Space Addressing
ADDRESS
0x0013 – 0x0010
0x000F – 0x000C
0x000B – 0x0008
0x0007 – 0x0004
0x0003 – 0x0000
MESSAGE VALUE
M[159:128]
M[127:96]
M[95:64]
M[63:32]
M[31:0]
DIGEST VALUE
A[31:0]
B[31:0]
C[31:0]
D[31:0]
E[31:0]
NOTE
See the SHA-1 and HMAC descriptions for more information on the meaning of the
variables in the above table.
Read
Digest
Flow
M/F = 0xDD
Write
Message
Flow
M/F = 0x22
(1) _{Master TX:}
16-bit address, A
(1) _{Master TX:}
16-bit address, A
Master RX:
CRC of M/F cmd & A
Master TX:
8-bit data, D
Master RX:
8-bit data @ A
A=A+1
A = 0x0013?
NO
YES
Master RX:
CRC of all data transmitted
ROM
Function
Flow
Master RX:
CRC of M/F cmd, A & D
Master RX:
D
Master RX:
CRC of preloaded
A[7:0] & shifted D
A = 0x0013?
NO
YES
ROM
Function
Flow
Master TX:
8-bit data, D
CRC = A[7:0]
A = A +1
(1) 16-Bit address is sent with lower 8-bit address followed by higher 8-bit address with least significant bit first.
Figure 21. Message/Digest Write/Read Flows
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