BQ26100_15 Datasheet, PDF (16/29 Pages) Texas Instruments – Based Security and Authentication IC

bq26100
SLUS696B – JUNE 2006 – REVISED AUGUST 2015
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Read
EEPROM
Flow
M/F = 0xE0
Write
EEPROM
Flow
M/F = 0x0E
(1) _{Master TX:}
16-bit address, A
Master RX:
CRC of M/F cmd & A
(1) _{Master TX:}
16-bit address, A
Master TX:
8-bit data, D
Master RX:
8-bit data @ A
A=A+1
A = 0x00F?
NO
YES
Master RX:
CRC of all data transmitted
Master waits 100 ms
Master RX:
CRC of M/F cmd, A & D
Master RX:
D
Master waits 50 ms
Master RX:
CRC of preloaded
A[7:0] & shifted D
Master TX:
8-bit data, D
CRC = A[7:0]
A = A +1
ROM
Function
Flow
A = 0x000F?
NO
YES
ROM
Function
Flow
(1) 16-Bit address is sent with lower 8-bit address followed by higher 8-bit address with least significant bit first.
Figure 16. EEPROM Write/Read Flows
7.5.3 SHA-1 Description
The SHA-1 is known as a one-way hash function, meaning there is no known mathematical method of computing
the input given only the output. The specification of the SHA-1, as defined by FIPS 180-2, states that the input
consists of 512 bit blocks with a total input length less than 2⁶⁴ bits. Inputs which do not conform to integer
multiples of 512 bit blocks are padded before any block is input to the hash function. The SHA-1 algorithm
outputs 160 bits, commonly referred to as the digest.
The full SHA-1 specification and algorithm can be found at http://csrc.nist.gov/publications/fips under FIPS 180.
(As of April 23, 2004, the latest revision is FIPS 180-2.)
The bq26100 device generates an SHA-1 input block of 288 bits (total input = 160 bit message + 128 bit key). To
complete the 512 bit block size requirement of the SHA-1, the bq26100 device pads the key and message with a
1, followed by 159 0’s, followed by the 64 bit value for 288 (000…00100100000), which conforms to the pad
requirements specified by FIPS 180-2 9 (Figure 17).
159 bits
64 bits
1 000 . . . 000 000 . . . 0100100000
Figure 17. SHA-1 Message Padding Format Example
7.5.4 Key Programming Description
The 128-bit key used in the HMAC calculation is built from two 64-bit key spaces on the bq26100 device. Each
key can be programmed independently, allowing multiple parties to program part of the full 128-bit key without
the knowledge necessary to reproduce the full 128-bit key. To further protect the 128-bit key, the value written to
each 64-bit non-volatile key space is the output of a SHA-1 calculation on a 160-bit input. Figure 18 provides a
flow for the programming of the 128-bit device key. Once KEYx has been programmed, the LOCKKx bit should
be programmed to 0 in the status register, preventing another value from overwriting that key space.
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