TMS320C6652 Datasheet, PDF (208/236 Pages) Texas Instruments – TMS320C6652 and TMS320C6654 Fixed and Floating-Point Digital Signal Processor

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
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8.3.15 IPC Acknowledgement Host (IPCARH) Register
IPCARH registers are provided to facilitate host DSP interrupt. Operation and use of IPCARH is the same
as other IPCAR registers. The IPC Acknowledgement Host Register is shown in Figure 8-14 and
described in Table 8-16.
Figure 8-14. IPC Acknowledgement Register (IPCARH)
31
30
29
28
27
8
SRCC SRCC SRCC SRCC
27
26
25
24
SRCC23 – SRCC4
RW +0 RW +0 RW +0 RW +0
RW +0 (per bit field)
Legend: R = Read only; RW = Read/Write; -n = value after reset
7
6
5
4
SRCC3 SRCC2 SRCC1 SRCC0
RW +0 RW +0 RW +0 RW +0
3
0
Reserved
R, +0000
BIT
31-4
FIELD
SRCCx
3-0 Reserved
Table 8-16. IPC Acknowledgement Register (IPCARH) Field Descriptions
DESCRIPTION
Interrupt source acknowledgement.
Reads return current value of internal register bit.
Writes:
• 0 = No effect
• 1 = Clears both SRCCx and the corresponding SRCSx
Reserved
208 Device Configuration
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