TMS320C6652 Datasheet, PDF (154/236 Pages) Texas Instruments – TMS320C6652 and TMS320C6654 Fixed and Floating-Point Digital Signal Processor

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
www.ti.com
6.19.1 uPP Register Descriptions
Table 6-59. Universal Parallel Port (uPP) Registers
BYTE ADDRESS
0x0258 0000
0x0258 0004
0x0258 0008
0x0258 0010
0x0258 0014
0x0258 0018
0x0258 001C
0x0258 0020
0x0258 0024
0x0258 0028
0x0258 002C
0x0258 0030
0x0258 0040
0x0258 0044
0x0258 0048
0x0258 0050
0x0258 0054
0x0258 0058
0x0258 0060
0x0258 0064
0x0258 0068
0x0258 0070
0x0258 0074
0x0258 0078
ACRONYM
UPPID
UPPCR
UPDLB
UPCTL
UPICR
UPIVR
UPTCR
UPISR
UPIER
UPIES
UPIEC
UPEOI
UPID0
UPID1
UPID2
UPIS0
UPIS1
UPIS2
UPQD0
UPQD1
UPQD2
UPQS0
UPQS1
UPQS2
REGISTER DESCRIPTION
uPP Peripheral Identification Register
uPP Peripheral Control Register
uPP Digital Loopback Register
uPP Channel Control Register
uPP Interface Configuration Register
uPP Interface Idle Value Register
uPP Threshold Configuration Register
uPP Interrupt Raw Status Register
uPP Interrupt Enabled Status Register
uPP Interrupt Enable Set Register
uPP Interrupt Enable Clear Register
uPP End-of-Interrupt Register
uPP DMA Channel I Descriptor 0 Register
uPP DMA Channel I Descriptor 1 Register
uPP DMA Channel I Descriptor 2 Register
uPP DMA Channel I Status 0 Register
uPP DMA Channel I Status 1 Register
uPP DMA Channel I Status 2 Register
uPP DMA Channel Q Descriptor 0 Register
uPP DMA Channel Q Descriptor 1 Register
uPP DMA Channel Q Descriptor 2 Register
uPP DMA Channel Q Status 0 Register
uPP DMA Channel Q Status 1 Register
uPP DMA Channel Q Status 2 Register
6.20 Emulation Features and Capability
6.20.1 Advanced Event Triggering (AET)
The C6654 and C6652 devices support advanced event triggering (AET). This capability can be used to
debug complex problems as well as understand performance characteristics of user applications. AET
provides the following capabilities:
• Hardware Program Breakpoints: specify addresses or address ranges that can generate events such
as halting the processor or triggering the trace capture.
• Data Watchpoints: specify data variable addresses, address ranges, or data values that can generate
events such as halting the processor or triggering the trace capture.
• Counters: count the occurrence of an event or cycles for performance monitoring.
• State Sequencing: allows combinations of hardware program breakpoints and data watchpoints to
precisely generate events for complex sequences.
For more information on AET, see the following documents in Section 10.3:
• Using Advanced Event Triggering to Find and Fix Intermittent Real-Time Bugs
• Using Advanced Event Triggering to Debug Real-Time Problems in High Speed Embedded
Microprocessor Systems
154 Detailed Description
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