SM320C6424-EP_14 Datasheet, PDF (202/237 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSOR

SM320C6424-EP
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS580 – JUNE 2009
www.ti.com
6.15 Ethernet Media Access Controller (EMAC)
The Ethernet Media Access Controller (EMAC) provides an efficient interface between C6424 and the
network. The C6424 EMAC supports two interface modes – Media Independent Interface (MII) and
Reduced Media Independent Interface (RMII). The MII mode supports both 10Base-T (10 Mbits/second
[Mbps]) and 100Base-TX (100 Mbps) in either half- or full-duplex mode. The RMII mode supports both
10Base-T (10 Mbits/second [Mbps]) and 100Base-TX (100 Mbps) in full-duplex mode only. The EMAC
module also supports hardware flow control and quality of service (QOS).
The EMAC controls the flow of packet data from the C6424 device to the PHY. The MDIO module controls
PHY configuration and status monitoring.
The EMAC module conforms to the IEEE 802.3-2002 standard, describing the “Carrier Sense Multiple
Access with Collision Detection (CSMA/CD) Access Method and Physical Layer” specifications. The IEEE
802.3 standard has also been adopted by ISO/IEC and re-designated as ISO/IEC 8802-3:2000(E).
Deviation from this standard, the EMAC module does not use the Transmit Coding Error signal MTXER.
Instead of driving the error pin when an underflow condition occurs on a transmitted frame, the EMAC will
intentionally generate an incorrect checksum by inverting the frame CRC, so that the transmitted frame
will be detected as an error by the network.
Both the EMAC and the MDIO modules interface to the C6424 device through a custom interface that
allows efficient data transmission and reception. This custom interface is referred to as the EMAC control
module, and is considered integral to the EMAC/MDIO peripheral. The control module is also used to
multiplex and control interrupts.
For more details on the C6424 EMAC peripheral, see the TMS320C6424 Ethernet Media Access
Controller (EMAC)/Management Data Input/Output (MDIO) Module User's Guide (literature number
SPRUEM6). For a list of supported registers and register fields, see Table 6-55 [Ethernet MAC (EMAC)
Control Registers] and Table 6-56 [EMAC Statistics Registers] in this data manual.
6.15.1 EMAC Device-Specific Information
Interface Modes
The EMAC module on the SM320C6424 supports two interface modes: Media Independent Interface (MII)
and Reduced Media Independent Interface (RMII). The MII interface mode is defined in the IEEE
802.3-2002 standard.
The RMII mode of the EMAC conforms to the RMII Specification (revision 1.2), as written by the RMII
Consortium. As the name implies, the Reduced Media Independent Interface (RMII) mode is a reduced
pin count version of the MII mode and only supports full-duplex mode.
Interface Mode Select
Although, the EMAC uses different pins for the MII and RMII modes, only one mode can be used at a time
because both modes share the same EMAC peripheral module. It is the user's responsibility to select only
one mode via the PINMUX1 register settings (specifically, the PCIEN, HOSTBK, and RMII bit fields). For a
detailed description of pin functions, see Section 2.5, Terminal Functions.
Note: In addition, the EMAC must be placed in reset (via the Power and Sleep Controller [PSC]) before
programming the PINMUX0 and PINMUX1 registers to select the EMAC pins.
202 Peripheral Information and Electrical Specifications
Submit Documentation Feedback