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DRV8801-Q1_16 Datasheet, PDF (2/28 Pages) Texas Instruments – DMOS Full-Bridge Motor Drivers
DRV8801-Q1
SLVSAS7B – FEBRUARY 2011 – REVISED JANUARY 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 4
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ..................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Timing Requirements ................................................ 7
6.7 Typical Characteristics .............................................. 9
7 Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 14
8 Application and Implementation ........................ 15
8.1 Application Information............................................ 15
8.2 Typical Application ................................................. 15
9 Power Supply Recommendations...................... 18
9.1 Bulk Capacitance .................................................... 18
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 19
11 Device and Documentation Support ................. 20
11.1 Documentation Support ........................................ 20
11.2 Community Resources.......................................... 20
11.3 Trademarks ........................................................... 20
11.4 Electrostatic Discharge Caution ............................ 20
11.5 Glossary ................................................................ 20
12 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (January 2014) to Revision B
Page
• Added ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 5
• Added tpd to the Overcurrent Control Timing image ............................................................................................................. 13
Changes from Original (February 2011) to Revision A
Page
• Deleteted part nuimber DRV8800-Q! from page header........................................................................................................ 1
• Added AEC-Q100 qualifications to Features list .................................................................................................................... 1
• Added an Applications section to the front page .................................................................................................................... 1
• Deleted Ordering Information table ........................................................................................................................................ 1
• Deleted DRV8800-Q! pinout diagram..................................................................................................................................... 4
• Deleted Terminal Name column for DRV8800-Q1 from Terminal Functions table ................................................................ 4
• Deleted DRV8800-Q1 pin descriptions for pins 5 and 9 from Terminal Functions table........................................................ 4
• Added a Thermal Information table ........................................................................................................................................ 5
• Removed DRV8800-Q1 part number from column heading of Thermal Information table .................................................... 5
• Changed parameter name and test condition for Electrical Characteristics, VTRP row ........................................................ 6
• Added two notes to end of Electrical Characteristics table .................................................................................................... 6
• Changed "Overcurrent protection period" parameter to "Overcurrent retry time" .................................................................. 7
• Deleted DRV8800-Q1 from text of Device Operation section .............................................................................................. 10
• Deleted DRV8800-Q1 Functional Block Diagram................................................................................................................. 10
• Updated the Overcurrent Control Timing image................................................................................................................... 13
• Changed active low to low in Diagnostic Output section...................................................................................................... 14
• Deleted VREG section; deleted "(DRV8801-Q1 Only)" from VPROPI section title.............................................................. 14
• Changed a value in row 5 of the Control Logic Table .......................................................................................................... 14
• Added a row to Control Logic Table ..................................................................................................................................... 14
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