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| DRV8801-Q1_16 Datasheet, PDF (13/28 Pages) Texas Instruments – DMOS Full-Bridge Motor Drivers | |||
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www.ti.com
V(OUTx)
Hi -Z
DRV8801-Q1
SLVSAS7B â FEBRUARY 2011 â REVISED JANUARY 2016
I(OUTx)
I(PEAK)
I(OCP)
Enable,
Source
or Sink
nFAULT
tpd
t(DEG)
t(OCP)
Motor Lead
Short Condition
Figure 7. Overcurrent Control Timing
Normal DC
No Fault Condition
7.3.7 VPROPI
The VPROPI output is equal to approximately five times the voltage present on the SENSE pin. VPROPI is
meaningful only if there is a resistor connected to the SENSE pin. If the SENSE pin is connected to ground,
VPROPI measures 0 V. Also note that during slow decay (brake), VPROPI measures 0 V. VPROPI can output a
maximum of 2.5 V, because at 500 mV on SENSE, the H-bridge is disabled.
7.3.8 Protection Circuits
The DRV8801-Q1 device is fully protected against VBB undervoltage, overcurrent, and overtemperature events.
Table 2. DRV8801-Q1 Fault Responses
FAULT
VBB undervoltage (UVLO)
Overcurrent (OCP)
Overtemperature Warning
(OTW)
Overtemperature
Shutdown (OTS)
ERROR REPORT
No error report â nFAULT
is hi-Z
nFAULT pulled low
nFAULT pulled low
nFAULT remains pulled
low (set during OTW)
H-BRIDGE
Disabled
Disabled
Enabled
Disabled
CHARGE PUMP
Shut Down
Operating
Operating
Shut Down
RECOVERY
VBB > VUVLO RISING
Retry time, t(OCP)
TJ < T(OTW) â Thys(OTW)
TJ < T(OTS) â Thys(OTS)
7.3.8.1 VBB Undervoltage Lockout (UVLO)
If at any time the voltage on the VBB pin falls below the undervoltage lockout threshold voltage, all FETs in the H-
bridge are disabled and the charge pump is disabled. The nFAULT pin does not report the UVLO fault condition
and remains hi-Z. Operation resumes when VBB rises above the UVLO threshold.
Copyright © 2011â2016, Texas Instruments Incorporated
Product Folder Links: DRV8801-Q1
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