TMS320C6671_16 Datasheet, PDF (166/238 Pages) Texas Instruments – Fixed and Floating-Point Digital Signal Processor

TMS320C6671
Fixed and Floating-Point Digital Signal Processor
SPRS756E—March 2014
Figure 7-32 TMS320C6671 System Event Inputs — C66x CorePac Primary Interrupts (Part 4 of 4)
Input Event Number Interrupt Event
Description
104
CIC0_OUT8
Interrupt Controller Output
105
CIC0_OUT9
Interrupt Controller Output
106
CIC0_OUT16
Interrupt Controller Output
107
CIC0_OUT17
Interrupt Controller Output
108
CIC0_OUT24
Interrupt Controller Output
109
CIC0_OUT25
110
MDMAERREVT
Interrupt Controller Output
VbusM error event
111
Reserved
112
EDMA3CC0_EDMACC_AETEVT
EDMA3CC0 AET event
113
PMC_ED
Single bit error detected during DMA read
114
EDMA3CC1_EDMACC_AETEVT
EDMA3CC1 AET Event
115
EDMA3CC2_EDMACC_AETEVT
EDMA3CC2 AET Event
116
UMC_ED1
Corrected bit error detected
117
UMC_ED2
Uncorrected bit error detected
118
PDC_INT
Power down sleep interrupt
119
SYS_CMPA
SYS CPU memory protection fault event
120
PMC_CMPA
PMC CPU memory protection fault event
121
PMC_DMPA
PMC DMA memory protection fault event
122
DMC_CMPA
DMC CPU memory protection fault event
123
DMC_DMPA
DMC DMA memory protection fault event
124
UMC_CMPA
UMC CPU memory protection fault event
125
UMC_DMPA
UMC DMA memory protection fault event
126
EMC_CMPA
EMC CPU memory protection fault event
127
End of Table 7-37
EMC_BUSERR
EMC bus error interrupt
1 CorePac[n] will receive TETBHFULLINTn, TETBFULLINTn, TETBACQINTn, TETBOVFLINTn, and TETBUNFLINTn.
2 CorePac[n] will receive MSMC_mpf_errorn.CIC.
3 CorePac[n] will receive SEMINTn and SEMERRn.
4 CorePac[n] will receive PCIEXpress_MSI_INTn.
5 CorePac[n] will receive TSIPx_xxx[n].
6 CorePac[n] will receive INTDST(n+16).
7 n is core number.
8 CorePac[n] will receive TINTLn and TINTHn.
9 CorePac[n] will receive GPINTn.
Table 7-38 CIC0 Event Inputs (Secondary Interrupts for C66x CorePacs) (Part 1 of 5)
Input Event# on CIC
0
1
2
3
4
5
6
7
8
System Interrupt
EDMA3CC1 CC_ERRINT
EDMA3CC1 CC_MPINT
EDMA3CC1 TC_ERRINT0
EDMA3CC1 TC_ERRINT1
EDMA3CC1 TC_ERRINT2
EDMA3CC1 TC_ERRINT3
EDMA3CC1 CC_GINT
Reserved
EDMA3CC1 CCINT0
Description
EDMA3CC1 error interrupt
EDMA3CC1 memory protection interrupt
EDMA3CC1 TC0 error interrupt
EDMA3CC1 TC1 error interrupt
EDMA3CC1 TC2 error interrupt
EDMA3CC1 TC3 error interrupt
EDMA3CC1 GINT
EDMA3CC1 individual completion interrupt
166 Peripheral Information and Electrical Specifications
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