AM1707_16 Datasheet, PDF (160/200 Pages) Texas Instruments – AM1707 ARM® Microprocessor

AM1707
SPRS637E – FEBRUARY 2010 – REVISED JUNE 2014
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6.25 USB1 Host Controller Registers (USB1.1 OHCI)
All the device USB interfaces are compliant with Universal Serial Bus Specification, Revision 1.1.
Table 6-94 is the list of USB1 Host Controller registers.
Table 6-94. USB1 Host Controller Registers
USB 1
BYTE ADDRESS
ACRONYM
REGISTER DESCRIPTION
0x01E2 5000
HCREVISION
OHCI Revision Number Register
0x01E2 5004
HCCONTROL
HC Operating Mode Register
0x01E2 5008
HCCOMMANDSTATUS
HC Command and Status Register
0x01E2 500C
HCINTERRUPTSTATUS
HC Interrupt and Status Register
0x01E2 5010
HCINTERRUPTENABLE
HC Interrupt Enable Register
0x01E2 5014
0x01E2 5018
0x01E2 501C
0x01E2 5020
0x01E2 5024
0x01E2 5028
0x01E2 502C
0x01E2 5030
HCINTERRUPTDISABLE
HCHCCA
HCPERIODCURRENTED
HCCONTROLHEADED
HCCONTROLCURRENTED
HCBULKHEADED
HCBULKCURRENTED
HCDONEHEAD
HC Interrupt Disable Register
HC HCAA Address Register⁽¹⁾
HC Current Periodic Register⁽¹⁾
HC Head Control Register⁽¹⁾
HC Current Control Register⁽¹⁾
HC Head Bulk Register⁽¹⁾
HC Current Bulk Register⁽¹⁾
HC Head Done Register⁽¹⁾
0x01E2 5034
HCFMINTERVAL
HC Frame Interval Register
0x01E2 5038
HCFMREMAINING
HC Frame Remaining Register
0x01E2 503C
HCFMNUMBER
HC Frame Number Register
0x01E2 5040
HCPERIODICSTART
HC Periodic Start Register
0x01E2 5044
HCLSTHRESHOLD
HC Low-Speed Threshold Register
0x01E2 5048
HCRHDESCRIPTORA
HC Root Hub A Register
0x01E2 504C
HCRHDESCRIPTORB
HC Root Hub B Register
0x01E2 5050
0x01E2 5054
0x01E2 5058
HCRHSTATUS
HCRHPORTSTATUS1
HCRHPORTSTATUS2
HC Root Hub Status Register
HC Port 1 Status and Control Register⁽²⁾
HC Port 2 Status and Control Register⁽³⁾
(1) Restrictions apply to the physical addresses used in these registers.
(2) Connected to the integrated USB1.1 phy pins (USB1_DM, USB1_DP).
(3) Although the controller implements two ports, the second port cannot be used.
Table 6-95. Switching Characteristics Over Recommended Operating Conditions for USB1
No.
PARAMETER
U1 t_r
U2 t_f
U3 t_RFM
U4 V_CRS
U5 t_j
U6 f_op
Rise time, USB1_DP and USB1_DM signals⁽¹⁾
Fall time, USB1_DP and USB1_DM signals⁽¹⁾
Rise/Fall time matching⁽²⁾
Output signal cross-over voltage⁽¹⁾
Differential propagation jitter⁽³⁾
Operating frequency⁽⁴⁾
(1) Low Speed: C_L = 200 pF. High Speed: C_L = 50pF
(2) t_RFM =( t_r/t_f ) x 100
(3) t _jr = t _px(1) - t_px(0)
(4) f_op = 1/t_per
LOW SPEED
MIN
75 ⁽¹⁾
75 ⁽¹⁾
80 ⁽²⁾
1.3 ⁽¹⁾
-25 ⁽³⁾
MAX
300 ⁽¹⁾
300 ⁽¹⁾
120 ⁽²⁾
2 ⁽¹⁾
25 ⁽³⁾
1.5
FULL SPEED
MAX
4 ⁽¹⁾
4 ⁽¹⁾
90 ⁽²⁾
1.3 ⁽¹⁾
-2 ⁽³⁾
MAX
20 ⁽¹⁾
20 ⁽¹⁾
110 ⁽²⁾
2 ⁽¹⁾
2 ⁽³⁾
12
UNIT
ns
ns
%
V
ns
MHz
160 Peripheral Information and Electrical Specifications
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