TMS320DM6431_15 Datasheet, PDF (159/227 Pages) Texas Instruments – Digital Media Processor

www.ti.com
TMS320DM6431
Digital Media Processor
SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008
6.9 External Memory Interface (EMIF)
DM6431 supports several memory and external device interfaces, including:
• Asynchronous EMIF (EMIFA) for interfacing to NOR Flash, SRAM, etc.
• NAND Flash
6.9.1 Asynchronous EMIF (EMIFA)
The DM6431 Asynchronous EMIF (EMIFA) provides an 8-bit data bus, an address bus width up to 24-bits,
and 4 chip selects, along with memory control signals. These signals are multiplexed between these
peripherals:
• EMIFA and NAND interfaces
• VPFE (CCDC)
• GPIO
6.9.2 NAND (NAND, SmartMedia, xD)
The EMIFA interface provides both the asynchronous EMIF and NAND interfaces. Four chip selects are
provided and each are individually configurable to provide either EMIFA or NAND support. The NAND
features supported are as follows.
• NAND flash on up to 4 asynchronous chip selects.
• 8-bit data bus width
• Programmable cycle timings.
• Performs ECC calculation.
• NAND Mode also supports SmartMedia and xD memory cards
• Boot ROM supports booting of the DM6431 from NAND flash located at CS2
The memory map for EMIFA and NAND registers is shown in Table 6-23. For more details on the EMIFA
and NAND interfaces, see Section 2.9, Documentation Support for the link to the TMS320DM643x DMP
Peripherals Overview Reference Guide (literature number SPRU983) for the TMS320DM643x
Asynchronous External Memory Interface (EMIF) User's Guide (literature number SPRU984).
Submit Documentation Feedback
Peripheral Information and Electrical Specifications 159