AM1810_16 Datasheet, PDF (153/262 Pages) Texas Instruments – AM1810 ARM® Microprocessor For PROFIBUS

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AM1810
SPRS709D – NOVEMBER 2010 – REVISED MARCH 2014
6.17.1 SPI Peripheral Registers Description(s)
Table 6-67 is a list of the SPI registers.
SPI0
BYTE ADDRESS
0x01C4 1000
0x01C4 1004
0x01C4 1008
0x01C4 100C
0x01C4 1010
0x01C4 1014
0x01C4 1018
0x01C4 101C
0x01C4 1020
0x01C4 1024
0x01C4 1028
0x01C4 102C
0x01C4 1030
0x01C4 1034
0x01C4 1038
0x01C4 103C
0x01C4 1040
0x01C4 1044
0x01C4 1048
0x01C4 104C
0x01C4 1050
0x01C4 1054
0x01C4 1058
0x01C4 105C
0x01C4 1060
0x01C4 1064
Table 6-67. SPIx Configuration Registers
SPI1
BYTE ADDRESS
0x01F0 E000
0x01F0 E004
0x01F0 E008
0x01F0 E00C
0x01F0 E010
0x01F0 E014
0x01F0 E018
0x01F0 E01C
0x01F0 E020
0x01F0 E024
0x01F0 E028
0x01F0 E02C
0x01F0 E030
0x01F0 E034
0x01F0 E038
0x01F0 E03C
0x01F0 E040
0x01F0 E044
0x01F0 E048
0x01F0 E04C
0x01F0 E050
0x01F0 E054
0x01F0 E058
0x01F0 E05C
0x01F0 E060
0x01F0 E064
ACRONYM
SPIGCR0
SPIGCR1
SPIINT0
SPILVL
SPIFLG
SPIPC0
SPIPC1
SPIPC2
SPIPC3
SPIPC4
SPIPC5
Reserved
Reserved
Reserved
SPIDAT0
SPIDAT1
SPIBUF
SPIEMU
SPIDELAY
SPIDEF
SPIFMT0
SPIFMT1
SPIFMT2
SPIFMT3
INTVEC0
INTVEC1
DESCRIPTION
Global Control Register 0
Global Control Register 1
Interrupt Register
Interrupt Level Register
Flag Register
Pin Control Register 0 (Pin Function)
Pin Control Register 1 (Pin Direction)
Pin Control Register 2 (Pin Data In)
Pin Control Register 3 (Pin Data Out)
Pin Control Register 4 (Pin Data Set)
Pin Control Register 5 (Pin Data Clear)
Reserved - Do not write to this register
Reserved - Do not write to this register
Reserved - Do not write to this register
Shift Register 0 (without format select)
Shift Register 1 (with format select)
Buffer Register
Emulation Register
Delay Register
Default Chip Select Register
Format Register 0
Format Register 1
Format Register 2
Format Register 3
Interrupt Vector for SPI INT0
Interrupt Vector for SPI INT1
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Peripheral Information and Electrical Specifications 153
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