TLC59116-Q1 Datasheet, PDF (15/39 Pages) Texas Instruments – 16-Channel Constant-Current LED Sink Driver

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TLC59116-Q1
SLDS223A – MARCH 2016 – REVISED MARCH 2016
M × 256 × 2 × 40 ns
with M = 0 to 255
(GRPPWM register)
Group Dimming Signal
N × 40 ns
with N = 0 to 255
(PWM register)
256 × 40 ns = 10.24 µs
(97.6 kHz)
256 × 2 × 256 × 40 ns = 5.24 ms (190.7 Hz)
Resulting Brightness + Group Dimming Signal
NOTE:
• Minimum pulse width for LEDn brightness control is 40 ns.
• Minimum pulse width for group dimming is 20.48 μs.
• When M = 1 (GRPPWM register value), the resulting LEDn Brightness Control + Group Dimming signal has two
pulses of the LED Brightness Control signal (pulse width = n × 40 ns, with n defined in the PWMx register).
• This resulting Brightness + Group Dimming signal shows a resulting control signal with M = 4 (8 pulses).
Figure 9. Brightness and Group Dimming Signals
9.4 Device Functional Modes
9.4.1 Active
Active mode occurs when one or more of the output channels is enabled.
9.4.2 Standby
Standby mode occurs when all output channels are disabled. Standby mode may be entered via I²C command or
by pulling the RESET pin low.
9.5 Programming
9.5.1 Characteristics of the I²C Bus
The I²C Bus is for two-way two-line communication between different devices or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a
pullup resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus
is not busy.
9.5.1.1 Bit Transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the high
period of the clock pulse as changes in the data line at this time will be interpreted as control signals (see
Figure 10).
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