LP2996 Datasheet, PDF (15/21 Pages) National Semiconductor (TI) – DDR Termination Regulator

QDR APPLICATIONS
Quad data rate (QDR) applications utilize multiple channels
for improved memory performance. However, this increase in
bus lines has the effect of increasing the current levels re-
quired for termination. The recommended approach in termi-
nating multiple channels is to use a dedicated LP2996 for
each channel. This simplifies layout and reduces the internal
power dissipation for each regulator. Separate V_REF signals
can be used for each DIMM bank from the corresponding
regulator with the chipset reference provided by a local resis-
tor divider or one of the LP2996 signals. Because V_REF and
V_TT are expected to track and the part to part variations are
minor, there should be little difference between the reference
signals of each LP2996.
OUTPUT CAPACITOR SELECTION
For applications utilizing the LP2996 to terminate SSTL-2 I/O
signals the typical application circuit shown in Figure 11 can
be implemented.
FIGURE 13. Typical SSTL-2 Application Circuit
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This circuit permits termination in a minimum amount of board
space and component count. Capacitor selection can be var-
ied depending on the number of lines terminated and the
maximum load transient. However, with motherboards and
other applications where V_TT is distributed across a long plane
it is advisable to use multiple bulk capacitors and addition to
high frequency decoupling. Figure 12 shown below depicts
an example circuit where 2 bulk output capacitors could be
situated at both ends of the V_TT plane for optimal placement.
Large aluminum electrolytic capacitors are used for their low
ESR and low cost.
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FIGURE 14. Typical SSTL-2 Application Circuit for Motherboards
In most PC applications an extensive amount of decoupling
is required because of the long interconnects encountered
with the DDR-SDRAM DIMMs mounted on modules. As a re-
sult bulk aluminum electrolytic capacitors in the range of
1000uF are typically used.
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