LP2996 Datasheet, PDF (13/21 Pages) National Semiconductor (TI) – DDR Termination Regulator

FIGURE 7. SSTL-2 Implementation with higher voltage rails
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DDR-II APPLICATIONS
With the separate VDDQ pin and an internal resistor divider
it is possible to use the LP2996 in applications utilizing DDR-
II memory. Figure 6 and Figure 7 show several implementa-
tions of recommended circuits with output curves displayed
in the Typical Performance Characteristics. Figure 6 shows
the recommended circuit configuration for DDR-II applica-
tions. The output stage is connected to the 1.8V rail and the
AVIN pin can be connected to either a 3.3V or 5V rail. For new
designs, the LP2997 or LP2998 is recommended for DDR-II
applications.
FIGURE 8. Recommended DDR-II Termination
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If it is not desirable to use the 1.8V rail it is possible to connect
the output stage to a 3.3V rail. Care should be taken to not
exceed the maximum junction temperature as the thermal
dissipation increases with lower V_TT output voltages. For this
reason it is not recommended to power PVIN off a rail higher
than the nominal 3.3V. The advantage of this configuration is
that it has the ability to source and sink a higher maximum
continuous current.
FIGURE 9. DDR-II Termination with higher voltage rails
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