LP2996 Datasheet, PDF (11/21 Pages) National Semiconductor (TI) – DDR Termination Regulator

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FIGURE 4. θ_JA vs Airflow Speed (JEDEC Board with 4
Vias)
Optimizing the θ_JA and placing the LP2996 in a section of a
board exposed to lower ambient temperature allows the part
to operate with higher power dissipation. The internal power
dissipation can be calculated by summing the three main
sources of loss: output current at V_TT, either sinking or sourc-
ing, and quiescent current at AVIN and VDDQ. During the
active state (when shutdown is not held low) the total internal
power dissipation can be calculated from the following equa-
tions:
Where,
P_D = P_AVIN + P_VDDQ + P_VTT
P_AVIN = I_AVIN * V_AVIN
P_VDDQ = V_VDDQ * I_VDDQ = V_VDDQ2 x R_VDDQ
To calculate the maximum power dissipation at V_TT both con-
ditions at V_TT need to be examined, sinking and sourcing
current. Although only one equation will add into the total,
V_TT cannot source and sink current simultaneously.
P_VTT = V_VTT x I_LOAD (Sinking) or
P_VTT = ( V_PVIN - V_VTT) x I_LOAD (Sourcing
The power dissipation of the LP2996 can also be calculated
during the shutdown state. During this condition the output
V_TT will tri-state, therefore that term in the power equation will
disappear as it cannot sink or source any current (leakage is
negligible). The only losses during shutdown will be the re-
duced quiescent current at AVIN and the constant impedance
that is seen at the VDDQ pin.
P_D = P_AVIN + P_VDDQ
P_AVIN = I_AVIN x V_AVIN
P_VDDQ = V_VDDQ * I_VDDQ = V_VDDQ2 x R_VDDQ
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