LME49830 Datasheet, PDF (15/23 Pages) National Semiconductor (TI) – Mono High Fidelity 200 Volt MOSFET Power Amplifier Input Stage with Mute

LME49830
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Demonstration Board Schematic
SNAS396D – JANUARY 2008 – REVISED APRIL 2013
+VCC
LVDD
RV
1W
JP1
10 k:
JP1 short to use
internal LVDD
DZ
5V
LVDD
LVDD
S1
RM
+ 27 k:
CM
47 PF
J3
Ci
Ri
220 PF 240:
CIN
RIN
10 PF 240:
CS5
100 PF ⁺
U1
+VCC
CS10
0.1 PF
+VCC
Mute
Mute
Control
Osense
NOUT
BiasP
IN- _-
IN+ ₊
RS
6.8 k:
BiasM
+VCC
CN
22 pF
POUT
CS3
+ _CS1
Comp
0.1 PF
470 PF
J1
CS13
+
CS4
CS2
0.1 PF
0.1 PF 470 PF
GND
-VEE
CS7
100 PF
+
-VEE
CS11
0.1 PF
RG
10:
-VEE
Power
GND
RF
6.8 k:
RGN
120:
+VCC
N-FET
IRFP240
+
CS6
100 PF
RBIAS
CBIAS ^{10 k:}
22 pF
RB1
1.2 k:
CB1
22 pF
QVBE
TIP31C
RQ
12 k:
CS9
0.1 PF
Power
GND
RSN
RB2
500:
10 :
CSN
0.1 PF
Power
GND
RL
8:
CC
22 pF
RGP
120:
CS8
100 PF +
P-FET
IRFP9240
-VEE
CS12
Power ^{0.1 PF}
GND
Figure 33. LME49830 Demo Board with Mute Function Schematic
Demonstration Board Layout
Figure 34. Top Silkscreen
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