TCA9543A_15 Datasheet, PDF (14/32 Pages) Texas Instruments – TCA9543A Low Voltage 2-Channel I2C Bus Switch With Interrupt Logic And Reset

TCA9543A
SCPS206A – MARCH 2014 – REVISED FEBRUARY 2015
Programming (continued)
Slave Address
Control Register
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SDA
S 1 1 1 0 0 A1 A0 0 A X X X X X X B1 B0 A P
Start
Condition
R/W Acknowledge
From Slave
Figure 12. Write Control Register
Acknowledge
From Slave
Stop
Condition
Data is read from the TCA9543A control register using the read mode shown in Figure 13.
Slave Address
Control Register
Last Byte
SDA
S 1 1 1 0 0 A1 A0 1 A X X INT1 INT0 X X B1 B0 NA P
Start
Condition
R/W Acknowledge
From Slave
Figure 13. Read Control Register
No Acknowledge
From Master
Stop
Condition
9.6 Register Maps
9.6.1 Device Address
Following a start condition, the bus master must output the address of the slave it is accessing. The address of
the TCA9543A is shown in Figure 14. To conserve power, no internal pullup resistors are incorporated on the
hardware-selectable address terminals and they must be pulled high or low.
1 1 1 0 0 A1 A0 R/W
Fixed
Hardware
selectable
Figure 14. Slave Address TCA9543A
The last bit of the slave address defines the operation to be performed. When set to a logic 1, a read is selected,
while a logic 0 selects a write operation.
9.6.2 Control Register Description
Following the successful acknowledgment of the slave address, the bus master sends a byte to the TCA9543A,
which is stored in the control register (see Figure 15). If multiple bytes are received by the TCA9543A, it saves
the last byte received. This register can be written and read via the I²C bus.
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