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SM72501 Datasheet, PDF (14/28 Pages) National Semiconductor (TI) – SolarMagic Precision, CMOS Input, RRIO, Wide Supply Range Amplifier
SM72501
SNIS157C – JANUARY 2011 – REVISED APRIL 2013
APPLICATION INFORMATION
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SM72501
The SM72501 is a low offset voltage, rail-to-rail input and output precision amplifier with a CMOS input stage and
wide supply voltage range of 2.7V to 12V. The SM72501 has a very low input bias current of only ±200 fA at
room temperature.
The wide supply voltage range of 2.7V to 12V over the extensive temperature range of −40°C to 125°C makes
the SM72501 an excellent choice for low voltage precision applications with extensive temperature requirements.
The SM72501 has only ±37 μV of typical input referred offset voltage and this offset is specified to be less than
±500 μV over temperature. This minimal offset voltage allows more accurate signal detection and amplification in
precision applications.
The low input bias current of only ±200 fA along with the low input referred voltage noise of 9 nV/√Hz gives the
SM72501 superiority for use in sensor applications. Lower levels of noise from the SM72501 means better signal
fidelity and a higher signal-to-noise ratio.
Technical support and extensive characterization data is available for sensitive applications or applications with a
constrained error budget.
The SM72501 is offered in the space saving 5-Pin SOT-23. This small package is an ideal solution for area
constrained PC boards and portable electronics.
CAPACITIVE LOAD
The SM72501 can be connected as a non-inverting unity gain follower. This configuration is the most sensitive to
capacitive loading.
The combination of a capacitive load placed on the output of an amplifier along with the amplifier's output
impedance creates a phase lag which in turn reduces the phase margin of the amplifier. If the phase margin is
significantly reduced, the response will be either underdamped or it will oscillate.
In order to drive heavier capacitive loads, an isolation resistor, RISO, in Figure 41 should be used. By using this
isolation resistor, the capacitive load is isolated from the amplifier's output, and hence, the pole caused by CL is
no longer in the feedback loop. The larger the value of RISO, the more stable the output voltage will be. If values
of RISO are sufficiently large, the feedback loop will be stable, independent of the value of CL. However, larger
values of RISO result in reduced output swing and reduced output current drive.
Figure 41. Isolating Capacitive Load
INPUT CAPACITANCE
CMOS input stages inherently have low input bias current and higher input referred voltage noise. The SM72501
enhances this performance by having the low input bias current of only ±200 fA, as well as, a very low input
referred voltage noise of 9 nV/√Hz. In order to achieve this a larger input stage has been used. This larger input
stage increases the input capacitance of the SM72501. The typical value of this input capacitance, CIN, for the
SM72501 is 25 pF. The input capacitance will interact with other impedances such as gain and feedback
resistors, which are seen on the inputs of the amplifier, to form a pole. This pole will have little or no effect on the
output of the amplifier at low frequencies and DC conditions, but will play a bigger role as the frequency
increases. At higher frequencies, the presence of this pole will decrease phase margin and will also cause gain
peaking. In order to compensate for the input capacitance, care must be taken in choosing the feedback
resistors. In addition to being selective in picking values for the feedback resistor, a capacitor can be added to
the feedback path to increase stability.
The DC gain of the circuit shown in Figure 42 is simply –R2/R1.
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