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DS92LV3241_14 Datasheet, PDF (14/32 Pages) Texas Instruments – 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
DS92LV3241, DS92LV3242
SNLS314D – SEPTEMBER 2009 – REVISED APRIL 2013
PDB
2.0V
RxIN [1:0]+/-
LOCK
TRI-STATE
RxOUT [31:0] TRI-STATE
RxCLKOUT
TRI-STATE
tRPLLS
0.8V
'RQ¶W &DUH
TRI-STATE
tHZR or tLZR
TRI-STATE
TRI-STATE
REN
Figure 13. Deserializer PLL Lock Time and PDB TRI-STATE Delay
REN
500:
VREF
CL = 8 pF
+
-
VREF = VDD/2 for tZLR or tLZR
VREF = 0V for tZHR or tHZR
VOH
REN
VOL
VDD/2
tLZR
VDD/2
tZLR
VOL
RxOUT [31:0]
VOH
tHZR
VOL + 0.5V
tZHR
VOL + 0.5V
VOH - 0.5V
VOH + 0.5V
Note: CL includes instrumentation and fixture capacitance within 6 cm of RxOUT [31:0].
Figure 14. Deserializer TRI_STATE Test Circuit and Timing
0
Dual Mode 50 MHz
-3
Quad Mode 85 MHz
-6
-9
1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07
FREQUENCY (Hz)
Figure 15. Serializer Jitter Transfer
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